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參數資料
| 型號： | PF48F2000P0ZBQ0 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | Intel StrataFlash Embedded Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 85 ns, PBGA88 |
| 封裝： | 8 X 10 MM, 1.20 MM HEIGHT, LEAD FREE, SCSP-88 |
| 文件頁數： | 69/102頁 |
| 文件大?。?/td> | 1609K |
| 代理商： | PF48F2000P0ZBQ0 |
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1-Gbit P30 Family
Datasheet
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
April 2005
69
13.0
Security Modes
The device features security modes used to protect the information stored in the flash memory
array. The following sections describe each security mode in detail.
13.1
Block Locking
Individual instant block locking is used to protect user code and/or data within the flash memory
array. All blocks power up in a locked state to protect array data from being altered during power
transitions. Any block can be locked or unlocked with no latency. Locked blocks cannot be
programmed or erased; they can only be read.
Software-controlled security is implemented using the Block Lock and Block Unlock commands.
Hardware-controlled security can be implemented using the Block Lock-Down command along
with asserting WP#. Also, V
PP
data security can be used to inhibit program and erase operations
(see
Section 11.6, “Program Protection” on page 66
and
Section 12.4, “Erase Protection” on
page 68
).
The P30 device also offers four pre-defined areas in the main array that can be configured as One-
Time Programmable (OTP) for the highest level of security. These include the four 32 KB
parameter blocks together as one and the three adjacent 128 KB main blocks. This is available for
top or bottom parameter devices.
13.1.1
Lock Block
To lock a block, issue the Lock Block Setup command. The next command must be the Lock Block
command issued to the desired block’s address (see
Section 9.2, “Device Commands” on page 50
and
Figure 46, “Block Lock Operations Flowchart” on page 91
). If the Set Read Configuration
Register command is issued after the Block Lock Setup command, the device configures the RCR
instead.
Block lock and unlock operations are not affected by the voltage level on V
PP
. The block lock bits
may be modified and/or read even if V
PP
is at or below V
PPLK
.
13.1.2
Unlock Block
The Unlock Block command is used to unlock blocks (see
Section 9.2, “Device Commands” on
page 50
). Unlocked blocks can be read, programmed, and erased. Unlocked blocks return to a
locked state when the device is reset or powered down. If a block is in a lock-down state, WP#
must be deasserted before it can be unlocked (see
Figure 32, “Block Locking State Diagram” on
page 70
).
13.1.3
Lock-Down Block
A locked or unlocked block can be locked-down by writing the Lock-Down Block command
sequence (see
Section 9.2, “Device Commands” on page 50
). Blocks in a lock-down state cannot
be programmed or erased; they can only be read. However, unlike locked blocks, their locked state
cannot be changed by software commands alone. A locked-down block can only be unlocked by
issuing the Unlock Block command with WP# deasserted. To return an unlocked block to locked-
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相關代理商/技術參數 |
參數描述 |
|---|---|
| PF48F2000P0ZBQ0A | 功能描述:IC FLASH 64MBIT 85NS 88TPBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 產品變化通告:Product Discontinuation 26/Apr/2010 標準包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應商設備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| PF48F2000P0ZTQ0 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:Numonyx StrataFlash Embedded Memory |
| PF48F2000P0ZTQ0A | 功能描述:IC FLASH 64MBIT 85NS 88TPBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 標準包裝:3,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:32K (4K x 8) 速度:100kHz，400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOIC 包裝:帶卷 (TR) 其它名稱:CAV24C32WE-GT3OSTR |
| PF48F2000W0YTQE | 制造商:Micron Technology Inc 功能描述:64X/0X QUAD 1.8 HF CUOSP - Tape and Reel |
| PF48F2000W0YTQEA | 制造商:Micron Technology Inc 功能描述:64X/0X QUAD 1.8 HF CUOSP - Trays |
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