參數(shù)資料
型號： PF48F2000P0ZBQ0
廠商： INTEL CORP
元件分類： PROM
英文描述： Intel StrataFlash Embedded Memory
中文描述： 4M X 16 FLASH 1.8V PROM, 85 ns, PBGA88
封裝： 8 X 10 MM, 1.20 MM HEIGHT, LEAD FREE, SCSP-88
文件頁數(shù)： 54/102頁
文件大?。?/td> 1609K
代理商： PF48F2000P0ZBQ0
1-Gbit P30 Family
April 2005
54
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
However, for a synchronous non-array read, the same word of data will be output on successive
clock edges until the burst length requirements are satisfied. Refer to the following waveforms for
more detailed information:
Figure 19, “Synchronous Single-Word Array or Non-array Read Timing” on page 39
Figure 20, “Continuous Burst Read, showing an Output Delay Timing” on page 40
Figure 21, “Synchronous Burst-Mode Four-Word Read Timing” on page 41
10.3
Read Configuration Register
The Read Configuration Register (RCR) is used to select the read mode (synchronous or
asynchronous), and it defines the synchronous burst characteristics of the device. To modify RCR
settings, use the Configure Read Configuration Register command (see
Section 9.2, “Device
Commands” on page 50
).
RCR contents can be examined using the Read Device Identifier command, and then reading from
offset 0x05 (see
Section 14.2, “Read Device Identifier” on page 76
).
The RCR is shown in
Table 22
. The following sections describe each RCR bit.
Table 22.
Read Configuration Register Description (Sheet 1 of 2)
Read Configuration Register (RCR)
Read
Mode
RES
Latency Count
WAIT
Polarity
Data
Hold
WAIT
Delay
Burst
Seq
CLK
Edge
RES
RES
Burst
Wrap
Burst Length
RM
R
LC[2:0]
WP
DH
WD
BS
CE
R
R
BW
BL[2:0]
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
Name
Description
15
Read Mode (RM)
0 = Synchronous burst-mode read
1 = Asynchronous page-mode read (default)
14
Reserved (R)
Reserved bits should be cleared (0)
13:11
Latency Count (LC[2:0])
010 =Code 2
011 =Code 3
100 =Code 4
101 =Code 5
110 =Code 6
111 =Code 7 (default)
(Other bit settings are reserved)
10
Wait Polarity (WP)
0 =WAIT signal is active low
1 =WAIT signal is active high (default)
9
Data Hold (DH)
0 =Data held for a 1-clock data cycle
1 =Data held for a 2-clock data cycle (default)
8
Wait Delay (WD)
0 =WAIT deasserted with valid data
1 =WAIT deasserted one data cycle before valid data (default)
7
Burst Sequence (BS)
0 =Reserved
1 =Linear (default)
6
Clock Edge (CE)
0 = Falling edge
1 = Rising edge (default)
5:4
Reserved (R)
Reserved bits should be cleared (0)
相關PDF資料
PDF描述
PF48F3000P0ZBQ0 CAP 0.01UF 63V 10% MET-POLY-BOX RAD5MM 7.5X6.5X2.5MM BULK
PF48F4000P0ZBQ0 Intel StrataFlash Embedded Memory
PF48F0P0ZBQ0 Intel StrataFlash Embedded Memory
PF48F2P0ZBQ0 Intel StrataFlash Embedded Memory
PF48F3P0ZBQ0 Intel StrataFlash Embedded Memory
相關代理商/技術參數(shù)
參數(shù)描述
PF48F2000P0ZBQ0A 功能描述:IC FLASH 64MBIT 85NS 88TPBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標準包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應商設備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ
PF48F2000P0ZTQ0 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:Numonyx StrataFlash Embedded Memory
PF48F2000P0ZTQ0A 功能描述:IC FLASH 64MBIT 85NS 88TPBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 標準包裝:3,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:32K (4K x 8) 速度:100kHz，400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOIC 包裝:帶卷 (TR) 其它名稱:CAV24C32WE-GT3OSTR
PF48F2000W0YTQE 制造商:Micron Technology Inc 功能描述:64X/0X QUAD 1.8 HF CUOSP - Tape and Reel
PF48F2000W0YTQEA 制造商:Micron Technology Inc 功能描述:64X/0X QUAD 1.8 HF CUOSP - Trays
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*