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參數(shù)資料
| 型號： | PCA8802U/2AA/1 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PBGA8 |
| 封裝： | 1.19 X 1.14 MM, 0.22 MM HEIGHT, LEAD FREE, WLCSP-8 |
| 文件頁數(shù)： | 8/34頁 |
| 文件大小： | 160K |
| 代理商： | PCA8802U/2AA/1 |
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PCA8802_1
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 19 February 2009
16 of 34
NXP Semiconductors
PCA8802
Smartcard RTC
9.6.5 Instruction 32k_cmd
The 32.768 kHz enable instruction (32k_cmd) is intended to aid with oscillator
characterization during system development. With this instruction it is possible to obtain a
32.768 kHz clock on the INT pin which may be used for measurement.
This mode does not affect other operation of the chip with the exception of loss of interrupt
output.
9.6.6 Instruction fst_cmd
The fast mode instruction (fst_cmd) is intended to enable faster system development.
When enabled, the counter will increment once every second instead of once every 32
seconds. Interrupt pulses will also be generated once every second.
When using fst_cmd, data access to the device must be completed within 1 second, if not
then counter increments will be lost. The 1 second period is measured from the ACK cycle
of a valid slave address to the next STOP or repeated START. A repeated START will be
sufcient to allow the counter to increment.
9.6.7 Instruction set_cmd
The counter can be set to any value using the set instruction (set_cmd). Partial writing of
the data parameters will result in partial setting of the counter. E.g. if data transfer is
stopped after P1[23:16] is transmitted, then only bit 23 to bit 16 will be updated.
Table 7.
Power-down sequence
Step Action
Code sequence Note
To enter power-down
1
initiate transfer
START condition -
2
send wrt_cmd
1010 0000
-
3
enable dvs_cmd
0001 0001
stop the divider
4
set counter with set_cmd
1000 0000
set the counter = AAAAAAh
1010 1010
P1[23:16]
1010 1010
P2[15:8]
1010 1010
P3[7:0]
5
enable pwd_cmd
0010 0001
stop the oscillator
6
end transfer
STOP condition
-
7
device is now in a
power-down state
--
To exit power-down
1
initiate transfer
START condition -
2
send wrt_cmd
1010 0000
-
3
disable pwd_cmd
0010 0000
oscillator starts on the ACK cycle of this
instruction
4
disable dvs_cmd
0001 0000
enable the divider again
5
end transfer
STOP condition
-
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