參數(shù)資料
型號(hào)： PCA8802U/2AA/1
廠商： NXP SEMICONDUCTORS
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PBGA8
封裝： 1.19 X 1.14 MM, 0.22 MM HEIGHT, LEAD FREE, WLCSP-8
文件頁(yè)數(shù)： 7/34頁(yè)
文件大小： 160K
代理商： PCA8802U/2AA/1
PCA8802_1
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 19 February 2009
15 of 34
NXP Semiconductors
PCA8802
Smartcard RTC
When the dividers are restarted, the rst increment of the 24 bit counter will be after 32
seconds.
When the dividers are restarted, the 8192 Hz clock could have just occurred and hence a
delay of 1
8192 seconds will occur before the next increment of the divider_2, or the
8192 Hz clock could be just about to occur and immediately increment the divider_2. As a
consequence, an uncertainty of one half clock period will be present when restarting (see
9.6.4 Instruction pwd_cmd
The power down instruction (pwd_cmd) is intended to be used to put the system into a low
power mode for storage. Static leakage current will be the only power consumed. Storage
at temperatures above room temperature may increase leakage currents.
Entering power-down requires a specic sequence of events since under normal
circumstances stopping the oscillator would result in a chip reset.
Divider_1 = dividing by 4.
Divider_2 = dividing by 8192.
Divider_3 = dividing by 32.
Fig 24. Instruction dvs_cmd
001aaj170
DIVIDER_2
DIVIDER_1
32.768 kHz
8.192 kHz
counter
first increment after dvs_cmd disable
will be after 32 seconds ±61
s
dvs_cmd disable
dvs_cmd
DIVIDER_3
1 Hz
24 BIT
COUNTER
1/32 Hz
clock
reset
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