參數(shù)資料
型號： PC33899CVW
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 運(yùn)動控制電子
英文描述： BRUSH DC MOTOR CONTROLLER, PDSO30
封裝： ROHS COMPLIANT, HSOP-30
文件頁數(shù)： 6/26頁
文件大小： 990K
代理商： PC33899CVW
Analog Integrated Circuit Device Data
14
Freescale Semiconductor
33899
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
LOAD CURRENT FEEDBACK (CSNS)
The load current sense circuit mirrors a sample of the load
current back to the microcontroller via the CSNS pin. It
supplies a current that is 1/400th of the load current (see
Equation 1). An analog multiplexer routes the enabled high
side current to the CSNS pin. An external resistor connected
to the CSNS pin (RCSNS) sets current to voltage gain. The
circuit operates properly in the presence of high-frequency
noise. An external capacitor may be necessary to provide
filtering.
Note This output is clamped so that it will not exceed VCC.
CHARGE PUMP RESERVOIR CAPACITOR (CRES)
The charge pump provides an output voltage over the full
operating VIGNP range that is sufficient to drive the output
MOSFETs and ensure that the output RDS(ON) specifications
are met. An external reservoir capacitor of 0.1
μF is
recommended. The charge pump operates at approximately
2.0MHz to 4.0MHz in order to prevent interference with AM
entertainment radio.
HIGH SIDE AND LOW SIDE SLEW TIME CONTROL
(RS)
The turn-on and the turn-off slew times on S0 and S1 (both
low and high side drive outputs) are adjustable from 5.0
μs
(50k
Ω RS) to 1.0μs (10kΩ RS) to reduce high-frequency
harmonic energy in the vehicle’s wiring harness. In addition,
slew time control is programmable to be either 1X, 2X, or 4X
(via the SPI) to lower power dissipation at elevated die
temperatures. The characteristics of the turn-on and turn-off
voltage are linear, with no discontinuities, during the output
driver state transitions. If the RS pin detects an impedance of
less than 5.0k
Ω to ground or greater than 1.0MΩ to ground,
it defaults to the fastest slew time of 1.0
μs.
LOW SIDE COMPARATOR ONE SHOT OUTPUT
(LSCMP)
The LSCMP output pin pulses high for 5
μs to 10μs any
time the low side comparator is tripped. Then the output goes
low during a 5
μs to 10μs blanking time. If another low side
comparator trip event is detected during the blanking time,
another 5
μs to 10μs pulse high occurs immediately after the
blanking interval.
Figure 8. LS Current Comparator One Shot
AUTOMATIC OUTPUT RE-ENABLE DISABLE
(REDIS)
The REDIS input pin automatically re-enables the low side
MOSFET once the REDIS input voltage exceeds 4.0V. An
external capacitor (CREDIS) determines the time interval (see
Equation 2). Once a low side current comparator is tripped, a
120μA current source linearly charges the capacitor until
either the next rising edge of PWM or the 4.0V trip level is
achieved. This re-enables the low side output MOSFET and
discharges the capacitor to 0V. This feature is disabled by
grounding this input.
As per the above equation, a 2.2nF capacitor will provide
a nominal 75
μs time interval.
VCSNS =
IOUT
400
RCSNS
.
Eq. 1
LS Current Comparator
Iload
PWM
LSCmp
5 - 10
μs
Pulse Out
5 - 10
μs
Blank Time
5 - 10
μs
Pulse Out
The REDIS min duration = 25
μs,
so CREDIS must be > 1nF
> 40
μs
5 - 10
μs
5 - 10
μs
CREDIS
I
.
dt =
dv
C
120
μA
. 4.0 V
=
Eq. 2
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