參數(shù)資料
型號: P89V660FBC,557
廠商: NXP Semiconductors
文件頁數(shù): 78/90頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 16K 44-TQFP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準包裝: 800
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP
其它名稱: 568-2433
935280829557
P89V660FBC
P89V660_662_664
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3.1 — 17 October 2011
8 of 90
NXP Semiconductors
P89V660/662/664
80C51 with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI
P3[2]/INT0
814
I
P3[2] — Port 3 bit 2.
I
INT0 — External interrupt 0 input.
P3[3]/INT1
915
I
P3[3] — Port 3 bit 3.
I
INT1 — External interrupt 1 input
P3[4]/T0/CEX3
10
16
I/O
P3[4] — Port 3 bit 4.
I
T0 — External count input to Timer/Counter 0.
I/O
CEX3 — Capture/compare external I/O for PCA Module 3.
P3[5]/T1/CEX4
11
17
I/O
P3[5] — Port 3 bit 5.
I
T1 — External count input to Timer/Counter 1
I/O
CEX4 — Capture/compare external I/O for PCA Module 4
P3[6]/WR
12
18
O
P3[6] — Port 3 bit 6.
O
WR — External data memory write strobe
P3[7]/RD
13
19
O
P3[7] — Port 3 bit 7.
O
RD — External data memory read strobe.
P4[0] to P4[3][1]
I/O with
internal
pull-up
Port 4: Port 4 is a 4-bit bidirectional I/O port with internal
pull-ups. Port 4 pins are pulled HIGH by the internal pull-ups
when ‘1’s are written to them and can be used as inputs in this
state. As inputs, Port 4 pins that are externally pulled LOW will
source current (IIL) because of the internal pull-ups.
P4[0]/SCL_1/
SPICLK
17
23
I/O
P4[0] — Port 4 bit 0.
I/O
SCL_1 — Second I2C-bus serial clock input/output
I/O
SPICLK — Serial clock input/output for SPI
P4[1]/SDA_1/
MISO
28
34
I/O
P4[1] — Port 4 bit 1.
I/O
SDA_1 — Second I2C-bus serial data input/output
I/O
MISO — Master input/slave output for SPI
P4[2]/MOSI
39
1
I/O
P4[2] — Port 4 bit 2.
I/O
MOSI — Master output/slave input for SPI
P4[3]/SS
612
I
P4[3] — Port 4 bit 3.
I
SS — Slave select input for SPI
PSEN
26
32
I/O
Program Store Enable: PSEN is the read strobe for external
program memory. When the device is executing from internal
program memory, PSEN is inactive (HIGH). When the device is
executing code from external program memory, PSEN is
activated twice each machine cycle, except that two PSEN
activations are skipped during each access to external data
memory.
RST
4
10
I
Reset: While the oscillator is running, a HIGH logic state on
this pin for two machine cycles will reset the device.
EA
29
35
I
External Access Enable: EA must be connected to VSS in
order to enable the device to fetch code from the external
program memory. EA must be strapped to VDD for internal
program execution.
Table 3.
Pin description …continued
Symbol
Pin
Type
Description
TQFP44
PLCC44
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