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參數(shù)資料
| 型號(hào)： | P87C554 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 80C51 8-bit microcontroller(80C51 8位微控制器) |
| 中文描述： | 80C51的8位微控制器（80C51的8位微控制器） |
| 文件頁(yè)數(shù)： | 49/78頁(yè) |
| 文件大?。?/td> | 393K |
| 代理商： | P87C554 |
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Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller
16K/512 OTP/ROM/ROMless, 8 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O
1999 Apr 07
49
S
08H
SLA
W
A
DATA
A
S
OTHER MST
CONTINUES
P
S
SLA
18H
28H
08H
OTHER MASTER SENDS REPEATED
START CONDITION EARLIER
RETRY
SU00975
Figure 44. Simultaneous Repeated START Conditions from 2 Masters
STA FLAG
STO FLAG
TIME LIMIT
SDA LINE
SCL LINE
START CONDITION
SU00976
Figure 45. Forced Access to a Busy I
2
C Bus
I
2
C B
US
O
BSTRUCTED
BY
A
L
OW
L
EVEL
ON
SCL
OR
SDA
An I
2
C bus hang-up occurs if SDA or SCL is pulled LOW by an
uncontrolled source. If the SCL line is obstructed (pulled LOW) by a
device on the bus, no further serial transfer is possible, and the
SIO1 hardware cannot resolve this type of problem. When this
occurs, the problem must be resolved by the device that is pulling
the SCL bus line LOW.
If the SDA line is obstructed by another device on the bus (e.g., a
slave device out of bit synchronization), the problem can be solved
by transmitting additional clock pulses on the SCL line (see Figure
46). The SIO1 hardware transmits additional clock pulses when the
STA flag is set, but no START condition can be generated because
the SDA line is pulled LOW while the I
2
C bus is considered free.
The SIO1 hardware attempts to generate a START condition after
every two additional clock pulses on the SCL line. When the SDA
line is eventually released, a normal START condition is transmitted,
state 08H is entered, and the serial transfer continues.
If a forced bus access occurs or a repeated START condition is
transmitted while SDA is obstructed (pulled LOW), the SIO1
hardware performs the same action as described above. In each
case, state 08H is entered after a successful START condition is
transmitted and normal serial transfer continues. Note that the CPU
is not involved in solving these bus hang-up problems.
B
US
E
RROR
A bus error occurs when a START or STOP condition is present at
an illegal position in the format frame. Examples of illegal positions
are during the serial transfer of an address byte, a data or an
acknowledge bit.
The SIO1 hardware only reacts to a bus error when it is involved in
a serial transfer either as a master or an addressed slave. When a
bus error is detected, SIO1 immediately switches to the not
addressed slave mode, releases the SDA and SCL lines, sets the
interrupt flag, and loads the status register with 00H. This status
code may be used to vector to a service routine which either
attempts the aborted serial transfer again or simply recovers from
the error condition as shown in Table 10.
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相關(guān)代理商/技術(shù)參數(shù) |
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| P87C554SBAA | 制造商:NXP Semiconductors 功能描述:MCU 8-Bit 87C 80C51 CISC 16KB EPROM 5V 68-Pin PLCC |
| P87C554SBAA,512 | 功能描述:8位微控制器 -MCU 80C51 16K/512 OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87C554SBBD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| P87C554SFAA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller ? 12 clock operation 16K/512 OTP/RAM 8 channel 10-bit A/D, I2C, PWM, capture/compare, high I/O |
| P87C554SFAA,512 | 功能描述:8位微控制器 -MCU 80C51 16K/512 OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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