參數(shù)資料
型號(hào): P80CE598
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontroller with on-chip CAN
中文描述: 8位微控制器芯片的CAN
文件頁(yè)數(shù): 9/108頁(yè)
文件大?。?/td> 507K
代理商: P80CE598
1996 Jun 27
9
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xCE598
4.
5.
ALE is activated every six oscillator periods. During an external data memory access one ALE pulse is skipped.
See Section 7.1, Table 3 for EA operation. For P83CE598 microcontrollers specified with the option ‘ROM-code
protection’, the EA pin is latched during reset and is ‘don't care’ after reset, regardless of whether the ROM-code
protection is selected or not.
Pin 78, REF:
a) Selection of input respectively output dependent of CAN Control Register bit 5 (CR.5; see Section 13.5.3
Table 32).
b) If the internal reference is used, then REF should be connected to AV
SS
via a capacitor with a value of
10 nF.
c) After an external reset (RST = HIGH) the internal
1
2
AV
DD
source is activated and, REF is a reference output.
d) If the CAN-controller is in the reset state, e.g. after an external reset, then the
1
2
AV
DD
source is switched off
during Power-down mode.
CAN Bus line:
a) CRX0 level > CRX1 level is interpreted as a logic 1 (recessive).
b) CRX0 level < CRX1 level is interpreted as a logic 0 (dominant).
The level of AV
REF+
must be higher than that of AV
REF
.
6.
7.
8.
Table 2
Pin description for pins with
alternative functions
(SOT318-2 and SOT351-1; see note 1)
SYMBOL
PIN
DESCRIPTION
DEFAULT
ALTERNATIVE
Port 4
P4.0 to P4.7
19 to 22, 24 to 27
19
20
21
22
24
25
26
27
8-bit quasi-bidirectional I/O port.
Compare and Set/Reset outputs
for Timer T2.
CMSR0
CMSR1
CMSR2
CMSR3
CMSR4
CMSR5
CMT0
CMT1
Compare and toggle outputs
for Timer T2.
Port 1
P1.0 to P1.7
31 to 36, 38 to 39
31
32
33
34
35
36
38
39
8-bit quasi-bidirectional I/O port.
Capture timer inputs
for Timer T2,
or
External interrupt inputs
2 to 5.
CT0I/INT2
CT1I/INT3
CT2I/INT4
CT3I/INT5
T2
RT2
CTX0
CTX1
T2 event input
(rising edge triggered).
T2 timer reset input
(rising edge triggered).
CAN transmitter
output 0 (note 2).
CAN transmitter
output 1 (note 2).
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