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參數(shù)資料
| 型號(hào)： | NSC800D |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| 中文描述： | NSC800TM高性能低功耗CMOS微處理器 |
| 文件頁(yè)數(shù)： | 17/76頁(yè) |
| 文件大小： | 785K |
| 代理商： | NSC800D |
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9.0 Timing and Control
(Continued)
During the opcode fetch, the CPU places the contents of
the PC on the address bus. The falling edge of ALE indi-
cates a valid address on the AD(0–7) lines. The WAIT input
is sampled during t
2
and if active causes the NSC800 to
insert a wait state (t
w
). WAIT is sampled again during t
w
so
that when it goes inactive, the CPU continues its opcode
fetch by latching in the data on the rising edge of RD from
the AD(0–7) lines. During t
3
, RFSH goes active and AD(0–
7) has the dynamic RAM refresh address from register R
and A(8–15) the interrupt vector from register I.
TL/C/5171–17
FIGURE 10a. Memory Read/Write Cycles without WAIT States
TL/C/5171–18
FIGURE 10b. Memory Read and Write with WAIT States
17
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NSC800E | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC800N | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC800V | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC858 | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858D | NSC858 Universal Asynchronous Receiver/Transmitter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NSC800D/883C | 制造商: 功能描述: 制造商:undefined 功能描述: |
| NSC800D/B | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| NSC800D-1I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800D-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800D-3/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
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