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參數(shù)資料
| 型號： | NDS352AP |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 小信號晶體管 |
| 英文描述： | P-Channel Logic Level Enhancement Mode Field Effect Transistor（-0.9A，-30V，0.5Ω）(P溝道邏輯增強(qiáng)型MOS場效應(yīng)管（漏電流-0.9A, 漏源電壓-30V，導(dǎo)通電阻0.5Ω）) |
| 中文描述： | 900 mA, 30 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | SUPERSOT-3 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 78K |
| 代理商： | NDS352AP |
February 1997
NDS352AP
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
________________________________________________________________________________
Absolute Maximum Ratings
Symbol
Parameter
T
A
= 25°C unless otherwise noted
NDS352AP
Units
V
DSS
Drain-Source Voltage
-30
V
V
GSS
I
D
Gate-Source Voltage - Continuous
±20
V
Maximum Drain Current - Continuous
(Note 1a)
±0.9
A
- Pulsed
±10
P
D
Maximum Power Dissipation
(Note 1a)
0.5
W
(Note 1b)
0.46
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
(Note 1a)
250
°C/W
Thermal Resistance, Junction-to-Case
(Note 1)
75
°C/W
NDS352AP Rev.D
These P -Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage applications
such as notebook computer power management, portable
electronics, and other battery powered circuits where fast
high-side switching, and low in-line power loss are needed in a
very small outline surface mount package.
-0.9 A, -30 V. R
DS(ON)
= 0.5
@ V
GS
= -4.5 V
R
DS(ON)
= 0.3
@ V
GS
= -10 V.
Industry standard outline SOT-23 surface mount package
using proprietary SuperSOT
TM
-3 design for superior thermal
and electrical capabilities.
High density cell design for extremely low R
DS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
D
S
G
1997 Fairchild Semiconductor Corporation
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NDS352P | P-Channel Logic Level Enhancement Mode Field Effect Transistor（-0.85A，-20V，0.5Ω）(P溝道邏輯增強(qiáng)型MOS場效應(yīng)管（漏電流-0.85A, 漏源電壓-20V，導(dǎo)通電阻0.5Ω）) |
| NDS355AN | N-Channel Logic Level Enhancement Mode Field Effect Transistor（1.7A，30V，0.125Ω）(N溝道邏輯增強(qiáng)型MOS場效應(yīng)管（漏電流1.7A, 漏源電壓30V，導(dǎo)通電阻0.125Ω）) |
| NDS355N | N-Channel Logic Level Enhancement Mode Field Effect Transistor（1.6A，30V，0.125Ω）(N溝道邏輯增強(qiáng)型MOS場效應(yīng)管（漏電流1.6A, 漏源電壓30V，導(dǎo)通電阻0.125Ω）) |
| NDS356AP | P-Channel Logic Level Enhancement Mode Field Effect Transistor（-1.1A，-30V，0.3Ω）(P溝道邏輯增強(qiáng)型MOS場效應(yīng)管（漏電流-1.1A, 漏源電壓-30V，導(dǎo)通電阻0.3Ω）) |
| NDS356 | P-Channel Logic Level Enhancement Mode Field Effect Transistor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NDS352AP | 制造商:Fairchild Semiconductor Corporation 功能描述:MOSFET P SOT-23 |
| NDS352AP | 制造商:Fairchild Semiconductor Corporation 功能描述:30V SSOT-3 PCH |
| NDS352AP_D87Z | 功能描述:MOSFET P-Ch LL FET Enhancement Mode RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| NDS352AP_ROHS | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| NDS352AP-CUT TAPE | 制造商:FAIRCHILD 功能描述:NDS Series P-Channel 30 V 0.5 Ohm Field Effect Transistor - SSOT-3 |
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