參數資料
型號: NCV7361AD
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Voltage Regulator with Integrated LIN Transceiver
中文描述: LINE TRANSCEIVER, PDSO8
封裝: SOIC-8
文件頁數: 22/28頁
文件大小: 192K
代理商: NCV7361AD
NCV7361A
http://onsemi.com
22
Figure 34. Safe Operating Area
5
60
17
40
18
15
14
V
SUP
(V)
I
V
30
10
0
6
16
19
7
20
13
12
11
10
8
9
50
SOIC8
T
A
= 125
°
C
T
J
= 150
°
C
maximum current
m
SOIC8
T
A
= 85
°
C
T
J
= 125
°
C
SOIC8
T
A
= 85
°
C
T
J
= 150
°
C
The linear regulator of the NCV7361A operates with
input voltages up to 18 V and can output a current of
50 mA. The maximum power dissipation limits the
maximum output current at high input voltages and high
ambient temperatures. The output current of 50 mA at an
ambient temperature of T
A
= 125
°
C is only possible with
small voltage differences between V
SUP
and V
CC
. See
Figure 34 for safe operating areas for different ambient and
junction temperatures.
Regulator Circuitry
Low Dropout Regulator
The voltage regulator of the NCV7361A is a low dropout
regulator
(LDO)
with
driving transistor.
This type of regulator has a standard pole, generated
from the internal frequency compensation and an
additional pole, which is dependent from the load and the
load capacity. This additional pole can cause an instable
behavior of the regulator! It requires a zero point to
compensate this additional pole. It can be realized via an
additional load resistor in series with a load capacity. It is
used
for
this
Equivalent Series Resistance (ESR) of the load capacity.
Every real capacity is characterized with an ESR value.
With the help of this ESR value an additional zero point is
implemented into the amplification loop and therefore the
result of the negative phase shift is compensated.
Because of this correlation the regulator has a stable
operating area which is defined by the load resistance R
L
,
the load capacity C
L
and the corresponding ESR value. The
load resistance resp. load current is defined by the
application itself and therefore the compensation of the
pole can only be done via variation of the load capacity and
ESR value.
a
PMOSFET
as
the
compensation
the
Input Capacity on V
SUP
C
IN
It is necessary to have an input capacity of C
IN
= 4.7 F.
Higher capacity values improve the line transient response
and the supply noise rejection behavior. The combination
of electrolytic capacity (e.g.100 F) in parallel with a
ceramic RFcapacity (e.g. 100 nF) archives good
disturbance suppressing.
The input capacity should be placed as close as possible
(< 1 cm) to the V
SUP
pin.
Load Capacity on V
OUT
C
L
The regulator is stabilized by the output capacitor C
L
.
The NCV7361A requires a minimum of 4.7 F capacity
connected to the 5.0 V output to insure stability. This
capacitor should maintain its ESR in the stable region of the
ESR curve (Figure 35) over the full operating temperature
range of the application. The capacity value and the ESR
of a capacitor changes with temperature. The minimal
capacity value must be kept within the whole operating
temperature range.
Example 1:
The regulator is stabilized using a 47 F aluminum
electrolytic capacitor load (ESR = 0.7
capacitance decreases to 42 F and the ESR increases to
8.9 at an ambient temperature of 40
°
C. The ESR value
is located in the unstable region. The regulator will be
unstable at 40
°
C.
@ 25
°
C). The
Example 2:
The regulator is stabilized using a 47 F tantalum
capacitor load (ESR = 0.1
decreases to 45 F and the ESR increases to 0.11 at an
ambient temperature of 40
°
C. The ESR value is located
in the stable region. The regulator will be stable at 40
°
C.
@ 25
°
C). The capacitance
Figure 35. ESR Curves for 6.8 F C
L
100 F and
Frequency of 100 kHz
0
100
Load Current (mA)
E
1
0.1
0.01
40
50
30
20
10
10
Unstable Region
Unstable Region
Stable Region
The value and type of the output capacitor can be
selected by using the diagram shown in Figure 35.
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