
NCV7361A
http://onsemi.com
15
RxD Output
The received BUS signal will be output to the 5.0 V RxD
pin:
BUS < V
thr_cnt
– 0.5 * V
thr_hys
→
RxD = low
BUS > V
thr_cnt
+ 0.5 * V
thr_hys
→
RxD = high
This output is a pushpull driver between V
OUT
and
GND with an output current capability of 1.0 mA.
Figure 20. RxD Output Circuitry
NCV7361A
MCU
RxD
V
OUT
Linear Regulator
The NCV7361A has an integrated low dropout linear
regulator with a PChannel MOSFET output driver whose
output is 5.0 V
2% at
50 mA and 5.5 V
18 V. Figure 21 shows typical current limit based on the
output voltage.
V
SUP
Figure 21. Characteristic of Current Limit
vs. Output Voltage
0
5
6
3
2
V
OUT
(V)
I
O
120
40
0
1
4
80
100
20
60
RESET
RESET switches from low to high if V
SUP
is switched on
and V
OUT
> V
RES
for t
Res
.
If V
OUT
drops below V
RES
, the RESET output goes from
high to low after t
rr
. Short transients will be filtered.
The RESET output driver is driven from V
OUT
to
guarantee proper operation.
Figure 22. Output Current of Reset Output vs.
V
OUT
Voltage
16
14
12
10
8
6
4
2
0
0
0.5
1.0
1.5
2.0
V
OUT
(V)
3.0
3.5
4.0 4.5
2.5
l
Initialization
The initialization is started if V
SUP
is switched on. This
is independent of the EN pin.
V
SUP
Power ON
The NCV7361A starts in the normal mode when V
SUP
is
applied [>3.15 V (typical)]. The internal circuitry on V
OUT
as well as the internal regulator starts the initialization with
poweronreset. The voltage regulator is switched on.
If V
OUT
> V
POR
the businterface will be activated.
If V
OUT
is higher than V
Res
, the reset time t
Res
= 100 ms
is started. After t
Res
the RESET output switches from low
to high (Figure 22).
The initialization procedure at power on is started
independent from the EN state. The regulator can only be
turned off with a high level followed by a low level on the
EN pin.
Mode Input EN
The NCV7361A is switched into the sleep mode when
EN goes from high to low. The normal mode will be kept
as long as EN = high.
The regulator can be turned off by switching EN high to
low independent of the state of the bustransceiver.
The EN input is internally pulled down to guarantee a
low with no connection. In the high state, the pulldown
current will be switched off to reduce the quiescent current.
The maximum input voltage is V
SUP
. The threshold is
typical 2.1 V and therefore CMOS levels can be used as
input signals. Figure 23 shows the internal circuitry of the
EN pin.
The EN input is internally pulled down to secure that if
this pin is not connected a low level will be generated. It
will be used two different pull down current sources for
high and low level to minimize the sleep mode current.