參數(shù)資料
型號(hào)： NCP5322ADWR2G
廠商： ON SEMICONDUCTOR
元件分類： 穩(wěn)壓器
英文描述： Two−Phase Buck Controller with Integrated Gate Drivers and 5−Bit DAC
中文描述： 1.5 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO28
封裝： LEAD FREE, SOIC-28
文件頁(yè)數(shù)： 12/31頁(yè)
文件大?。?/td> 726K
代理商： NCP5322ADWR2G
NCP5322A
http://onsemi.com
12
APPLICATIONS INFORMATION
Overview
The
Semiconductor was developed using the Enhanced V
2
topology to meet requirements of low voltage, high current
loads with fast transient requirements. Enhanced V
2
combines
the original V
2
topology with peak currentmode control for
fast transient response and current sensing capability. The
addition of an internal PWM ramp and implementation of
fastfeedback directly from V
CORE
has improved transient
response and simplified design. The NCP5322A includes
Power Good (PWRGD) and MOSFET gate drivers to
provide a “fully integrated solution” to simplify design,
minimize circuit board area, and reduce overall system cost.
Two advantages of a multiphase converter over a
singlephase converter are current sharing and increased
apparent output frequency. Current sharing allows the
designer to use less inductance in each phase than would be
required in a singlephase converter. The smaller inductor
will produce larger ripple currents but the total per phase
power dissipation is reduced because the RMS current is lower.
Transient response is improved because the control loop will
measure and adjust the current faster in a smaller output
inductor. Increased apparent output frequency is desirable
because the off time and the ripple voltage of the twophase
converter will be less than that of a singlephase converter.
NCP5322A
DC/DC
controller
from
ON
Fixed Frequency MultiPhase Control
In a multiphase converter, multiple converters are
connected in parallel and are switched on at different times.
This reduces output current from the individual converters
and increases the apparent ripple frequency. Because several
converters are connected in parallel, output current can ramp
up or down faster than a single converter (with the same
value output inductor) and heat is spread among multiple
components.
The NCP5322A controller uses twophase, fixed
frequency, Enhanced V
2
architecture to measure and control
currents in individual phases. Each phase is delayed 180
°
from the previous phase. Normally, GATE(H) transitions to
a high voltage at the beginning of each oscillator cycle.
Inductor current ramps up until the combination of the
current sense signal, the internal ramp and the output voltage
ripple trip the PWM comparator and bring GATE(H) low.
Once GATE(H) goes low, it will remain low until the
beginning of the next oscillator cycle. While GATE(H) is
high, the Enhanced V
2
loop will respond to line and load
variations. On the other hand, once GATE(H) is low, the loop
can not respond until the beginning of the next PWM cycle.
Therefore, constant frequency Enhanced V
2
will typically
respond to disturbances within the offtime of the converter.
The Enhanced V
2
architecture measures and adjusts the
output current in each phase. An additional input (CSn) for
inductor current information has been added to the V
2
loop
for each phase as shown in Figure 10. The triangular inductor
current is measured differentially across RS, amplified by
CSA and summed with the Channel Startup Offset, the
Internal Ramp, and the Output Voltage at the noninverting
input of the PWM comparator. The purpose of the Internal
Ramp is to compensate for propagation delays in the
NCP5322A. This provides greater design flexibility by
allowing smaller external ramps, lower minimum pulse
widths, higher frequency operation, and PWM duty cycles
above 50% without external slope compensation. As the
sum of the inductor current and the internal ramp increase,
the voltage on the positive pin of the PWM comparator rises
and terminates the PWM cycle. If the inductor starts a cycle
with higher current, the PWM cycle will terminate earlier
providing negative feedback. The NCP5322A provides a
CSn input for each phase, but the CS
REF
and COMP inputs
are common to all phases. Current sharing is accomplished
by referencing all phases to the same CS
REF
and COMP
pins, so that a phase with a larger current signal will turn off
earlier than a phase with a smaller current signal.
相關(guān)PDF資料
PDF描述
NCP5331FTR2G Two-Phase PWM Controller with Integrated Gate Drivers
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NCP5422ADR2G Dual Out−of−Phase Synchronous Buck Controller with Current Limit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NCP5331 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two-Phase PWM Controller with Integrated Gate Drivers
NCP5331/D 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two Phase PWM Controller with Integrated Gate Drivers
NCP5331_05 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two-Phase PWM Controller with Integrated Gate Drivers
NCP5331FTR2 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
NCP5331FTR2G 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate Drivers for Athlon RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
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