參數(shù)資料
型號(hào)： NCP5314FTR2G
廠商： ON SEMICONDUCTOR
元件分類： 穩(wěn)壓器
英文描述： Two/Three/Four−Phase Buck CPU Controller
中文描述： SWITCHING CONTROLLER, 1200 kHz SWITCHING FREQ-MAX, PQFP32
封裝： LEAD FREE, LQFP-32
文件頁(yè)數(shù)： 25/29頁(yè)
文件大小： 684K
代理商： NCP5314FTR2G
NCP5314
http://onsemi.com
25
9. Error Amplifier Tuning
After the steadystate (static) AVP has been set and the
current sense network has been optimized, the Error
Amplifier must be tuned. The gain of the Error Amplifier
should be adjusted to provide an acceptable transient
response by increasing or decreasing the Error Amplifier’s
feedback capacitor (C
AMP
in the Applications Diagram).
The bandwidth of the control loop will vary directly with the
gain of the error amplifier.
If C
AMP
is too large, the loop gain/bandwidth will be low,
the COMP pin will slew too slowly and the output voltage
will overshoot as shown in Figure 33. On the other hand, if
C
AMP
is too small, the loop gain/bandwidth will be high, the
COMP pin will slew very quickly and overshoot will occur.
Integrator “wind up” is the cause of the overshoot. In this
case, the output voltage will transition more slowly because
COMP spikes upward as shown in Figure 34. Too much loop
gain/bandwidth increases the risk of instability. In general,
one should use the lowest loop gain/bandwidth possible to
achieve acceptable transient response. This will insure good
stability. If C
AMP
is optimal, the COMP pin will slew
quickly but not overshoot and the output voltage will
monotonically settle as shown in Figure 35.
After the control loop is tuned to provide an acceptable
transient response, the steadystate voltage ripple on the
COMP pin should be examined. When the converter is
operating at full steadystate load, the peaktopeak voltage
ripple (V
PP
) on the COMP pin should be less than 20 mV
PP
as shown in Figure 36. Less than 10 mV
PP
is ideal. Excessive
ripple on the COMP pin will contribute to jitter.
Figure 33. The Value of C
AMP
Is Too High and the
Loop Gain/Bandwidth Too Low. COMP Slews Too
Slowly Which Results in Overshoot in V
OUT
.
Figure 34. The Value of C
AMP
Is Too Low and the
Loop Gain/Bandwidth Too High. COMP Moves Too
Quickly, Which Is Evident from the Small Spike in Its
Voltage When the Load Is Applied or Removed. The
Output Voltage Transitions More Slowly Because of
the COMP Spike.
Figure 35. The Value of C
AMP
Is Optimal. COMP Slews
Quickly Without Spiking or Ringing. V
OUT
Does Not
Overshoot and Monotonically Settles to Its Final Value.
Figure 36. At FullLoad the PeaktoPeak Voltage
Ripple on the COMP Pin Should Be Less than 20 mV
for a WellTuned/Stable Controller. Higher COMP
Voltage Ripple Will Contribute to Output Voltage Jitter.
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