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參數(shù)資料
| 型號(hào)： | NCN6010DTBR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 電源管理 |
| 英文描述： | SIM Card Supply and Level Shifter |
| 中文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO14 |
| 封裝： | LEAD FREE, TSSOP-14 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大?。?/td> | 173K |
| 代理商： | NCN6010DTBR2 |
NCN6010
http://onsemi.com
6
SIM INTERFACE SECTION
(Note 7.)
Rating
Symbol
Pin
Min
Typ
Max
Unit
SIM_VCC = +5.0 V
Output RESET V
OH
@ Isim_rst = +200
μ
A
Output RESET V
OL
@ Isim_rst = –200
μ
A
Output RESET Rise Time @ Cout = 50 pF
Output RESET Fall Time @ Cout = 50 pF
SIM_VCC = +3.0 V
Output RESET V
OH
@ Isim_rst = +200
μ
A
Output RESET V
OL
@ Isim_rst = –200
μ
A
Output RESET Rise Time @ Cout = 50 pF
Output RESET Fall Time @ Cout = 50 pF
SIM_RST
Note 5.
8
SIM_VCC – 0.7
0
0.8 * SIM_VCC
0
–
SIM_VCC
0.6
400
400
SIM_VCC
0.2 * SIM_VCC
400
400
V
V
ns
ns
V
V
ns
ns
SIM_VCC = +5.0 V
Output Duty Cycle
Output Frequency
Output SIM_CLK Rise Time @ Cout = 50 pF
Output SIM_CLK Fall Time @ Cout = 50 pF
Output V
OH
@ Isim_clk = +20
μ
A
Output V
OL
@ Isim_clk = –200
μ
A
SIM_VCC = +3.0 V
Output Duty Cycle
Output Frequency
Output SIM_CLK Rise Time @ Cout = 50 pF
Output SIM_CLK Fall Time @ Cout = 50 pF
Output V
OH
@ Isim_clk = +20
μ
A
Output V
OL
@ Isim_clk = –20
μ
A
SIM_CLK
Note 5.
Note 6.
9
40
0.7 * SIM_VCC
0
40
0.7 * SIM_VCC
0
–
60
5.0
18
18
SIM_VCC
0.5
60
5.0
18
18
SIM_VCC
0.2 * SIM_VCC
%
MHz
ns
ns
V
V
%
MHz
ns
ns
V
V
SIM_VCC = +5.0 V
SIM_I/O Data Transfer Frequency
SIM_I/O Rise Time @ Cout = 50 pF
SIM_I/O Fall Time @ Cout = 50 pF
Output V
OH
@ I
SIM_IO
= +20
μ
A, V
IH
= V
DD
Output V
OL
@ I
SIM_IO
= –1.0 mA,
V
IL
I/O = 0 V
SIM_VCC = +3.0 V
SIM_I/O Data Transfer Frequency
SIM_I/O Rise Time @ Cout = 50 pF
SIM_I/O Fall Time @ Cout = 50 pF
Output V
OH
@ I
SIM_IO
= +20
μ
A, V
IH
= V
DD
Output V
OL
@ I
SIM_IO
= –1.0 mA,
V
IL
I/O = 0 V
SIM_I/O
11
0.7 * SIM_VCC
0
0.7 * SIM_VCC
0
15
15
160
0.8
0.8
SIM_VCC
0.4
160
0.8
0.8
SIM_VCC
0.4
kHz
μ
s
μ
s
V
V
kHz
μ
s
μ
s
V
V
I/O Pull Up Resistor
I/O_
RP
5
13
20
–
k
Card I/O Pull Up Resistor
SIM_I/O_
RP
11
13
20
–
k
5. Internal NMOS device, biased to V
DD
, provides low impedance when SIM_V
CC
is disconnected to sustain GSM 11.11–200
μ
A input current
test.
6. The SIM_CLK clock can operate up to 10 MHz, but the rise and fall time are not guaranteed to be fully within the ISO7816 specification over
the temperature range. Typically, tr and tf are 12 ns @ CRD_CLK = 10 MHz.
7. Digital inputs undershoot
–0.30 V, Digital inputs overshoot
0.30 V.
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| NCN6011/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power Level Shifter |
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