參數(shù)資料
型號: NCN6010DTBR2
廠商: ON SEMICONDUCTOR
元件分類: 電源管理
英文描述: SIM Card Supply and Level Shifter
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO14
封裝: LEAD FREE, TSSOP-14
文件頁數(shù): 12/16頁
文件大?。?/td> 173K
代理商: NCN6010DTBR2
NCN6010
http://onsemi.com
12
It is clear that, with nearly half an ohm of resistance is
series with the pure capacitor, the tantalum or the electrolytic
type will generate high voltage spikes and poor regulation in
the high frequency operating charge pump built into the
NCN6010. Moreover, with ESR in the 3.0 Ohm range, low
cost capacitors are not suitable for this application.
Figure 11 provides the schematic diagram of the simulated
charge pump circuit. Although this schematic does not
represent the accurate internal structure of the NCN6010, it
can be used for engineering purpose. The ABM devices S1,
S2, S4 and S5 have been defined in the PSPICE model to
represent the NMOS and PMOS used in the silicon. The
ESR value of C2 and C3 can be adjusted, at PSPICE level,
to cope with any type of external capacitors and are useful
to double check the behavior of the system as a function of
the external passives components.
+
+
+
+
+
+
+
S1
U1A
74HC08
1
2
3
U3A
74HC14
1
2
U2A
74HC14
1
2
S2
V1
275 V
V2
V1 = 0
V2 = 3
Transfer Capacitor
S4
+
E5
EVALUE
S5
Battery Pack
V3
5.0 V
+
+
TD = 10 ns
TR = 10 ns
TF = 10 ns
PW = 600 ns
PER = 1200 ns
+
+
OUT+ IN+
OUT– IN–
R1
0.1 R
C1
4.7
μ
F
IC = 0
S
V
OFF
= 0.0 V
V
ON
= 1.0 V
S
V
OFF
= 2.0 V
V
ON
= 0.0 V
R2
0.1 R
C2
1
μ
F
R4
0.05 R
C3
220 nF
S
V
ON
= 1.0 V
V
OFF
= 0.0 V
S
V
OFF
= 2.0 V
V
ON
= 0.0 V
R3
0.5 R
Figure 11. Charge Pump Simulation Schematic Diagram
if (V (%IN+, %IN–) > 80 mV, 5, 0)
R5
500 R
L
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