參數(shù)資料
型號： NCN6001DTBR2
廠商： ON SEMICONDUCTOR
元件分類： 其它接口
英文描述： Compact Smart Card Interface IC
中文描述： SPECIALTY INTERFACE CIRCUIT, PDSO20
封裝： LEAD FREE, TSSOP-20
文件頁數(shù)： 8/36頁
文件大?。?/td> 332K
代理商： NCN6001DTBR2
NCN6001
http://onsemi.com
8
POWER SUPPLY
@ 2.7 V < V
CC
< 5.5 V (-25
°
C to +85
°
C ambient temperature, unless otherwise noted)
.
Rating
Pin
Symbol
Min
Typ
Max
Unit
Input Power Supply
9
V
CC
2.70
-
5.50V
V
Standby Supply Current Conditions:
INT = CLK_IN = CLK_SPI = CS = H
I/O = MOSI = EN_RPU = H, No Card Inserted
V
CC
= 3.0 V
V
CC
= 5.0 V
9
Icc
sb
-
-
25
35
50
60
DC Operating Current
CLK_IN = Low, All Card Pins Unloaded
@ V
CC
= 3.3 V, CRD_VCC = 5.0 V
@ V
CC
= 5.5 V, CRD_VCC = 5.0 V
9
Icc
op
-
-
-
-
0.5
1.5
mA
V
CC
Under Voltage Detection
High
V
CC
Under Voltage Detection
Low
V
CC
Under Voltage (Note 7)
9
VCC
LH
VCC
LL
VCC
POR
2.20
2.00
1.50
-
-
-
2.70
2.60
2.20
V
Output Card Supply Voltage
@ 2.7 V < V
CC
< 5.5 V
CRD_VCC = 1.8 V @ Iload = 35 mA
CRD_VCC = 3.0 V @ Iload = 60 mA
CRD_VCC = 5.0 V @ Iload = 65 mA
13
V
C2H
V
C3H
V
C5H
1.65
2.75
4.75
-
1.80
3.00
5.00
1.95
3.25
5.25
V
Maximum Continuous Output Current
@ CRD_VCC = 1.8 V
@ CRD_VCC = 3.0 V
@ CRD_VCC = 5.0 V
13
Icc
35
60
65
-
-
-
-
-
-
mA
Output Over Current Limit
V
CC
= 3.3 V, CRD_VCC = 1.8 V, 3.0 V or 5.0 V
V
CC
= 5.0 V, CRD_VCC = 1.8 V, 3.0 V or 5.0 V
13
Iccov
-
-
100
150
-
-
mA
Output Dynamic Peak Current
@ CRD_VCC = 1.8 V, 3.0 V or 5.0 V, Cout = 10 F
(Notes 5 and 6)
13
Iccd
100
-
-
mA
Output Card Supply Voltage Ripple
@ V
CC
= 3.6 V, Lout = 22 H, Cout1 = Cout2 = 4.7 F
Ceramic X7R, Iout = 55 mA
CRD_VCC = 5.0 V
(Note 5)
CRD_VCC = 3.0 V
CRD_VCC = 1.8 V
13
-
-
-
-
35
35
35
-
-
-
mV
Output Card Supply Turn On Time @
Lout = 22 F, Cout1 = 10 F Ceramic
V
CC
= 2.7 V, CRD_VCC = 5.0 V
13
Vcc
TON
-
-
500
s
Output Card Supply Shut Off Time @
Cout1 = 10 F, Ceramic
V
CC
= 2.7 V, CRD_VCC = 5.0 V, VCC
OFF
< 0.4 V
5. Ceramic X7R, SMD type capacitors are mandatory to achieve the CRD_VCC specifications. When an electrolytic capacitor is used, the
external filter must include a 220 nF, max 50 m ESR capacitor in parallel, to reduce both the high frequency noise and ripple to a minimum.
Depending upon the PCB layout, it might be necessary to use two 4.7 F/6.0 V/ceramic/X5R/SMD 0805 in parallel, yielding an improved
CRD_VCC ripple over the temperature range.
6. Pulsed current, according to ISO7816-3, paragraph 4.3.2.
7. No function externally available during the V
CC
POR sequence.
13
Vcc
TOFF
-
100
250
s
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