參數(shù)資料
型號(hào)： NCN6001DTBR2
廠商： ON SEMICONDUCTOR
元件分類： 其它接口
英文描述： Compact Smart Card Interface IC
中文描述： SPECIALTY INTERFACE CIRCUIT, PDSO20
封裝： LEAD FREE, TSSOP-20
文件頁(yè)數(shù)： 4/36頁(yè)
文件大?。?/td> 332K
代理商： NCN6001DTBR2
NCN6001
http://onsemi.com
4
PIN FUNCTIONS AND DESCRIPTION (continued)
Pin
Description
Type
Name
9
V
CC
POWER
This pin is connected to the NCN6001 supply voltage and must be bypassed to
ground by a 10 F/6.0 V capacitor.
Since tantalum capacitors have relative high ESR, using low ESR ceramic type
(MURATA X5R, Resr < 100 m ) is highly recommended.
10
Lout_H
POWER
The High Side of the external inductor is connected between this pin and Lout_L/pin
12 to provide the DC/DC function. The current flowing into this inductor is internally
sensed and no external shunt resistor is used. Typically, Lout = 22 H, with ESR <
2
.0
, yields a good efficiency performance for a maximum 65 mA DC output load.
Note: The inductor shall be sized to handle the 450 mA peak current flowing during the
DC/DC operation (see CoilCraft manufacturer data sheet).
11
PWR_GND
POWER
This pin is the Power Ground associated with the built-in DC/DC converter and must
be connected to the system ground together with GROUND pin 16. Using good quality
ground plane is recommended to avoid spikes on the logic signal lines.
12
Lout_L
POWER
The High Side of the external inductor is connected between this pin and Lout_H to
activate the DC/DC function. The built-in NMOS and PMOS devices provide the
switching function together with the CRD_VCC voltage rectification (Figure 17).
13
CRD_VCC
POWER
This pin provides the power to the external card. It is the logic level “1” for CRD_IO,
CRD_RST, CRD_C4, CRD_C8 and CRD_CLK signals.
The energy stored by the DC/DC external inductor Lout must be smoothed by a
10 F/Low ESR capacitor, connected across CRD_VCC and GND. Using ceramic
type of capacitor (MURATA X5R, ESR < 50 m ) is strongly recommended. In the
event of a CRD_VCC U
VLOW
voltage, the NCN6001 detects the situation and
feedback the information in the STATUS bit. The device does not take any further
action, particularly the DC/DC converter is neither stopped nor re programmed by the
NCN6001. It is up to the external MPU to handle the situation.
However, when the CRD_VCC is overloaded, the NCN6001 shuts off the DC/DC
converter, runs a Power Down ISO sequence and reports the fault in the STATUS
register.
Since high transient current flows from this pin to the load, care must be observed, at
PCB level, to minimize the series ESR and ESL parasitic values. The NCN6001 demo
board provides an example of a preferred PCB layout.
14
C8/S0
I/O
Auxiliary mixed analog/digital line to handle either a synchronous card, or as Chip
Select Identification (MISO, Bit 0): see Figure 9. The pin is driven by an open drain
stage, the pull up resistor being connected to the CRD_VCC supply. When the pin is
used as a logic input (asynchronous cards), the positive logic condition applies:
Connected to GND
→
Logic = Zero
Connected to V
CC
or left Open
→
Logic = One
A built-in accelerator circuit makes sure the output positive going rise time is fully
within the ISO/EMV specifications.
NOTE:
The pin is capable of reading the logic level when the chip operates an
asynchronous interface, but is not intended to read the data from the
external card when operated in the synchronous mode. It merely returns the
logic state forced during a write instruction to the card.
15
C4/S1
I/O
Auxiliary mixed analog/digital line to handle either a synchronous card, or as Chip
Select Identification (MISO, Bit 1): see Figure 9. The pin is driven by an open drain
stage, the pull up resistor being connected to the CRD_VCC supply. When the pin is
used as a logic input (asynchronous cards), the positive logic condition applies:
Connected to GND
→
Logic = Zero
Connected to V
CC
or left Open
→
Logic = One
A built-in accelerator circuit makes sure the output positive going rise time is fully
within the ISO/EMV specifications.
NOTE:
The pin is capable of reading the logic level when the chip operates an
asynchronous interface, but is not intended to read the data from the
external card when operated in the synchronous mode. It merely returns the
logic state forced during a write instruction to the card.
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