Table 6. AC CHARACTERISTICS VCC = 2.5" />
參數(shù)資料
型號(hào): NB6L56MNG
廠商: ON Semiconductor
文件頁(yè)數(shù): 7/10頁(yè)
文件大小: 0K
描述: IC MUX 2.5V/3.3V DUAL DIFF 32QFN
標(biāo)準(zhǔn)包裝: 74
系列: ECLinPS MAX™
類型: 扇出緩沖器(分配),多路復(fù)用器,數(shù)據(jù)
電路數(shù): 2
比率 - 輸入:輸出: 2:1
差分 - 輸入:輸出: 是/是
輸入: CML,LVDS,LVPECL
輸出: LVPECL
頻率 - 最大: 2.5GHz
電源電壓: 2.375 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN(5x5)
包裝: 管件
NB6L56
http://onsemi.com
6
Table 6. AC CHARACTERISTICS VCC = 2.5 ± 5% (2.375 V to 2.625 V); VCC = 3.3 ± 10% (3.0 V to 3.6 V) (Note 8)
Symbol
Characteristic
Min
Typ
Max
Unit
fMAX
Maximum Input Clock Frequency
Voutpp w 400 mV
Maximum Operating Data Rate (NRZ)
Voutpp w 400 mV
2.5
Ghz
Gbps
fSEL
Maximum Toggle Frequency, SELA/SELB
25
50
MHz
VOUTPP
Output Voltage Amplitude (Differential Interconnect) fin ≤ 2.5 GHz
400
mVpp
tPLH,
tPHL
Propagation Delay to Differential Outputs, @ 1 GHz,
INxn/INxn to Qx, Qx
SELx to Qx, Qx
160
100
250
260
360
400
ps
tPLH Tempco
Differential Propagation Delay Temperature Coefficient
143
Dfs/°C
tskew
Input to Input per Bank Within Device
Output Bank to Output Bank Within Device
10
12
20
25
ps
tJITTER
DATA JITTER
RJ for K28.7 at 2.5 GHz (RMS)
DJ for NRZ PRBS23 / K28.5 at 2.5 Gbps
CLOCK JITTER
Cycle to Cycle (1K WFMS; RMS)
Total Jitter TJ (PP)
1
10
1
10
ps
tjit(f)
Integrated Phase Jitter fin = 155.52 MHz and 1GHz 12 kHz * 20 MHz Offset
(RMS)
35
fs
tJITTER
Crosstalk Induced Jitter Input to Input per Output Bank Within Device (Note 9)
0.7
psRMS
VINPP
Input Voltage Swing (Differential Configuration) (Note 10)
100
1200
mV
tr,, tf
Output Rise/Fall Times @ 1 GHz (20% 80%), Qx, Qx
50
100
180
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Differential 50% duty cycle at VINPPmin clock source. Outputs evaluated with 50 W resistors to VTT = VCC 2.0 V (See Figure 16). Input
crosspoint to output crosspoint for INxn/INxn to Qx, Qx; 50% input to output crosspoint for SELx to Qx, Qx. See Figures 5, 10 and 11.
9. Crosstalk is measured at the output while applying two similar clock frequencies that are asynchronous with respect to each other at the
inputs.
10.Input voltage swing is a singleended measurement operating in differential mode.
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