- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄96107 > MTV25N50E (ON SEMICONDUCTOR) 25 A, 500 V, 0.2 ohm, N-CHANNEL, Si, POWER, MOSFET PDF資料下載
參數(shù)資料
| 型號(hào)： | MTV25N50E |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | JFETs |
| 英文描述： | 25 A, 500 V, 0.2 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | CASE 433-01, D3PAK, 3 PIN |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大?。?/td> | 238K |
| 代理商： | MTV25N50E |
MTV25N50E
7
Motorola TMOS Power MOSFET Transistor Device Data
INFORMATION FOR USING THE DPAK SURFACE MOUNT PACKAGE
RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must be
the correct size to ensure proper solder connection interface
between the board and the package. With the correct pad
geometry, the packages will self align when subjected to a
solder reflow process.
0.190
4.826
mm
inches
0.100
2.54
0.063
1.6
0.165
4.191
0.118
3.0
0.243
6.172
POWER DISSIPATION FOR A SURFACE MOUNT DEVICE
The power dissipation for a surface mount device is a
function of the drain pad size.
These can vary from the
minimum pad size for soldering to a pad size given for
maximum power dissipation. Power dissipation for a surface
mount device is determined by TJ(max), the maximum rated
junction temperature of the die, RθJA, the thermal resistance
from the device junction to ambient, and the operating
temperature, TA. Using the values provided on the data sheet,
PD can be calculated as follows:
PD =
TJ(max) TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device. For a D3PAK
device, PD is calculated as follows.
PD =
150
°C 25°C
62.5
°C/W
= 2.0 Watts
The 62.5
°C/W for the D3PAK package assumes the use of
the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 2.0 Watts. There are
other alternatives to achieving higher power dissipation from
the surface mount packages. One is to increase the area of the
drain pad. By increasing the area of the drain pad, the power
dissipation can be increased. Although one can almost double
the power dissipation with this method, one will be giving up
area on the printed circuit board which can defeat the purpose
of using surface mount technology. For example, a graph of
RθJA versus drain pad area is shown in Figure 15.
Figure 15. Thermal Resistance versus Drain Pad
Area for the D3PAK Package (Typical)
1.75 Watts
Board Material = 0.0625
″
G10/FR4, 2 oz Copper
80
100
60
40
20
10
8
6
4
2
0
3.0 Watts
5.0 Watts
TA = 25°C
A, AREA (SQUARE INCHES)
T
O
AMBIENT
(
C/W)°
R
JA
,THERMAL
RESIST
ANCE,
JUNCTION
θ
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad
. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MTV32N20E-RL | 32 A, 200 V, 0.075 ohm, N-CHANNEL, Si, POWER, MOSFET |
| MTV32N25E-RL | 32 A, 250 V, 0.08 ohm, N-CHANNEL, Si, POWER, MOSFET |
| MTW10N100E | 10 A, 1000 V, 1.3 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-247AE |
| MTW15N25E | 15 A, 250 V, 0.28 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-247 |
| MTW22N20E | 22 A, 200 V, 0.15 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-247 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MTV2-5PH016 | 制造商:ITT Interconnect Solutions 功能描述:Cable Assembly Pre-Wired Pigtail 0.152m 26AWG 5 POS Micro Strip PIN Crimp |
| MTV2-5PH025 | 制造商:ITT Interconnect Solutions 功能描述:MTV2-5PH025 - Bulk |
| MTV2-5PL2 | 制造商:ITT Interconnect Solutions 功能描述:MTV2-5PL2 - Bulk |
| MTV2-5SL1 | 制造商:ITT Interconnect Solutions 功能描述:MTV2-5SL1 - Bulk |
| MTV2-60PH003 | 制造商:ITT Interconnect Solutions 功能描述:CONN UNSHRD HDR PIN 60 POS 2.54MM ST CBL MNT - Bulk |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。