參數(shù)資料
型號: MTP4N40E
廠商: ON SEMICONDUCTOR
元件分類: JFETs
英文描述: 4 A, 400 V, 1.8 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
封裝: CASE 221A-06, 3 PIN
文件頁數(shù): 1/8頁
文件大?。?/td> 199K
代理商: MTP4N40E
1
Motorola TMOS Power MOSFET Transistor Device Data
Designer’s
Data Sheet
TMOS EFET.
Power Field Effect Transistor
NChannel EnhancementMode Silicon Gate
This high voltage MOSFET uses an advanced termination
scheme to provide enhanced voltageblocking capability without
degrading performance over time. In addition, this advanced TMOS
EFET is designed to withstand high energy in the avalanche and
commutation modes. The new energy efficient design also offers a
draintosource diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
Robust High Voltage Termination
Avalanche Energy Specified
SourcetoDrain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
DraintoSource Voltage
VDSS
400
Vdc
DraintoGate Voltage (RGS = 1.0 M)
VDGR
400
Vdc
GatetoSource Voltage — Continuous
— NonRepetitive (tp ≤ 10 ms)
VGS
VGSM
± 20
± 40
Vdc
Vpk
Drain Current
— Continuous
— Continuous @ 100
°C
— Single Pulse (tp ≤ 10 s)
ID
IDM
4.0
3.0
14
Adc
Apk
Total Power Dissipation
Derate above 25
°C
PD
74
0.59
Watts
W/
°C
Operating and Storage Temperature Range
TJ, Tstg
55 to 150
°C
Single Pulse DraintoSource Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak IL = 4.0 Apk, L = 25 mH, RG = 25 )
EAS
200
mJ
Thermal Resistance — Junction to Case
— Junction to Ambient
RθJC
RθJA
1.7
62.5
°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8
″ from case for 10 seconds
TL
260
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
EFET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
Order this document
by MTP4N40E/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MTP4N40E
TMOS POWER FET
4.0 AMPERES
400 VOLTS
RDS(on) = 1.8 OHM
Motorola Preferred Device
D
S
G
CASE 221A06, Style 5
TO220AB
Motorola, Inc. 1996
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