參數(shù)資料
型號(hào): MT93L00A
廠商: Zarlink Semiconductor Inc.
英文描述: Multi-Channel Voice Echo Canceller
中文描述: 多通道語(yǔ)音回聲消除器
文件頁(yè)數(shù): 24/39頁(yè)
文件大小: 636K
代理商: MT93L00A
MT93L00A
Data Sheet
24
Zarlink Semiconductor Inc.
Bit
Name
Description
7
0
Must be set to zero.
6-4
SupDec
These three bits control how long the echo canceller remains in a fast convergence
state following a path change, Reset or Bypass operation. A value of zero will keep
the echo canceller in fast convergence indefinitely.
3-0
res
Reserved bits. Must always be set to zero for normal operation.
Echo Canceller A, Control Register A4
Echo Canceller B, Control Register B4
res
res
res
res
SD
0
SD
1
SD
2
0
7
6
5
4
3
2
1
0
Reset Value:
50
H
.
Read/Write Address: 09
H
+ Base Address
Read/Write Address: 29
H
+ Base Address
Power Reset Value
74h
7
6
5
4
3
2
1
0
NS
7
NS
6
NS
5
NS
4
NS
2
NS
1
NS
0
NS
3
Echo Canceller A, Noise Scaling (NS)
Echo Canceller B, Noise Scaling (NS)
Read/Write Address: 0Ah + Base Address
Read/Write Address: 2Ah + Base Address
If the comfort noise level estimator is unable to correctly match the background noise level, this register can be used to scale the
comfort noise up or down. A neutral value of 80h will prevent any scaling. Values less than 80h will scale the comfort noise level
down. Values greater than 80h will scale the comfort noise level up. Scaling is done linearly, so to scale the comfort noise
down
by
1 dB, a value of 72h would be used (-1 dB = 89% of original level, 0.89
(dec)
80h = 72h). Similarly, to scale up by 1 dB, use a value of
8Fh (1 dB = 112% of original level, 1.12
(dec)
80h = 8Fh).
Power Reset Value
0Ch
7
6
5
4
3
2
1
0
IR
7
IR
6
IR
5
IR
4
IR
2
IR
1
IR
0
IR
3
Echo Canceller A, Injection Rate (IR)
Echo Canceller B, Injection Rate (IR)
Read/Write Address: 0Bh + Base Address
Read/Write Address: 2Bh + Base Address
The NLP ramps-in comfort noise during the initial background noise estimation stage. This register provides control over the
ramp-in speed. Higher values will increase the ramp-in speed.
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