參數(shù)資料
型號(hào)： MT93L00A
廠商： Zarlink Semiconductor Inc.
英文描述： Multi-Channel Voice Echo Canceller
中文描述： 多通道語(yǔ)音回聲消除器
文件頁(yè)數(shù)： 16/39頁(yè)
文件大小： 636K
代理商： MT93L00A
MT93L00A
Data Sheet
16
Zarlink Semiconductor Inc.
Figure 9 - Memory Mapping
Power Up Sequence
On power up, the RESET pin must be held low for 100
μ
s. Forcing the RESET pin low will put the MT93L00 in
power down state. In this state, all internal clocks are halted, D<7:0>, Sout, Rout, DTA and IRQ pins are tristated.
The 16 Main Control Registers, the Interrupt FIFO Register and the Test Register are reset to zero.
When the RESET pin returns to logic high and a valid MCLK is applied, the user must wait 500
μ
s for the PLL to
lock. C4i and F0i can be active during this period. At this point, the echo canceller must have the internal registers
reset to an initial state. This is accomplished by one of two methods. The user can either issue a second hardware
reset or perform a software reset. A second hardware reset is performed by driving the RESET pin low for at least
500 ns and no more than 1500 ns before being released. A software reset is accomplished by programming a “1” to
each of the PWUP bits in the Main Control Registers, waiting 250
μ
s (2 frames) and then programming a “0” to
each of the PWUP bits.
The user must then wait 500
μ
s for the PLL to relock. Once the PLL has locked, the user can power up the 16
groups of echo cancellers individually by writing a “1” into the PWUP bit in Main Control Register of each echo
canceller group.
For each group of echo cancellers, when the PWUP bit toggles from zero to one, echo cancellers A and B execute
their initialization routine. The initialization routine sets their registers, Base Address+00
H
to Base Address+3F
H
, to
the default Reset Value and clears the Adaptive Filter coefficients. Two frames are necessary for the initialization
routine to execute properly.
Once the initialization routine is executed, the user can set the per channel Control Registers, Base Address+00
H
to Base Address+3F
H
, for the specific application.
0000h -->
Channel 0, EC A Ctrl/Stat Registers
001Fh
0020h -->
Channel 1, EC B Ctrl/Stat Registers
003Fh
0040h -->
Channel 2, EC A Ctrl/Stat Registers
005Fh
0060h -->
Channel 3, EC B Ctrl/Stat Registers
007Fh
03C0h -->
Channel 30, EC A Ctrl/Stat Registers
03DFh
03E0h -->
Channel 31, EC B Ctrl/Stat Registers
03FFh
0400h --> 040Fh
Main Control Registers <15:0>
Group 0
Echo
Cancellers
Registers
Groups 2 --> 14
Echo Cancellers
Registers
Group 1
Echo
Cancellers
Registers
Group 15
Echo
Cancellers
Registers
0410h
Interrupt FIFO Register
0411h
Test Register
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT93L00AB 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 32CH G.164/G.165/G.168/G.711 W/ TONE DET - Trays
MT93L00AV 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 32CH G.164/G.165/G.168/G.711 W/ TONE DET - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCELLER 208PBGA 制造商:Microsemi Corporation 功能描述:IC VOICE ECHO CANCELLER 208PBGA
MT93L04 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:128-Channel Voice Echo Canceller
MT93L04A 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:128-Channel Voice Echo Canceller
MT93L04AG 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 128CH G.164/G.165/G.168/G.711 W/ TONE DE - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCEL 365MCMBGA
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