參數(shù)資料
型號(hào)： MT9162AN1
廠(chǎng)商： ZARLINK SEMICONDUCTOR INC
元件分類(lèi)： 編解碼器
英文描述： 5 Volt Single Rail Codec
中文描述： A/MU-LAW, PROGRAMMABLE CODEC, PDSO20
封裝： 5.30 MM, SSOP-20
文件頁(yè)數(shù)： 10/22頁(yè)
文件大小： 568K
代理商： MT9162AN1
MT9162
Data Sheet
10
Zarlink Semiconductor Inc.
AC Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
AC Characteristics
for D/A (Receive) Path
- 0dBm0 = A
Lo3.17
- 3.17dB = 1.773V
rms
for
μ
-Law and 0dBm0 = A
Lo3.14
- 3.14dB = 1.843V
rms
for A-Law, at the Codec. (V
Ref
=0.6 volts and V
Bias
=2.5 volts.)
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
Analog output at the Codec full
scale
A
Lo3.17
A
Lo3.14
G
AR1
7.225
7.481
Vp-p
Vp-p
μ
-Law
A-Law
2
Absolute half-channel gain.
Din to AOUT
±
-0.8
0
0.8
dB
@1020Hz
3
Gain tracking vs. input level
ITU-T G.714 Method 2
G
TR
-0.3
-0.6
-1.6
0.3
0.6
1.6
dB
dB
dB
3 to -40 dBm0
-40 to -50 dBm0
-50 to -55 dBm0
4
Signal to total distortion vs. input
level.
ITU-T G.714 Method 2
G
QR
35
29
24
dB
dB
dB
0 to -30 dBm0
-40 dBm0
-45 dBm0
5
Receive Idle Channel Noise
N
CR
N
PR
G
RR
7
-84
10
-80
dBrnC0
dBm0p
μ
-Law
A-Law
6
Gain relative to gain at 1020Hz
200Hz
300 - 3000 Hz
3000 - 3400 Hz
4000 Hz
>4600 Hz
-0.25
-0.90
0.25
0.25
0.25
-12.5
-25
dB
dB
dB
dB
dB
7
Absolute Delay
D
AR
D
DR
240
μ
s
at frequency of min. delay
8
Group Delay relative to D
AR
750
380
130
750
μ
s
μ
s
μ
s
μ
s
500-600 Hz
600 - 1000 Hz
1000 - 2600 Hz
2600 - 2800 Hz
9
CrosstalkD/A to A/D
A/D to D/A
CT
RT
CT
TR
-74
-80
dB
dB
G.714.16
ITU-T
Electrical Characteristics
for Analog Outputs
Characteristics
Sym.
Min.
Typ.
Max
.
Units
Test Conditions
1
Load impedance at Output
E
ZL
E
CL
20k
ohms
across AOUT
±
2
Allowable output capacitive
load
20
pF
each pin:AOUT+, AOUT-
3
Analog output harmonic distortion
E
D
0.5
%
20k ohms load across
AOUT
±
VO
≤
693mV
RMS
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