參數(shù)資料
型號(hào): MT8966AS
廠商: Mitel Networks Corporation
元件分類: Codec
英文描述: Integrated PCM Filter Codec
中文描述: 集成的PCM編解碼器
文件頁(yè)數(shù): 2/32頁(yè)
文件大?。?/td> 607K
代理商: MT8966AS
MT8960/61/62/63/64/65/66/67
Data Sheet
2
Zarlink Semiconductor Inc.
Figure 2 - Pin Connections
Pin Description
Pin Name
Description
CSTi
Control ST-BUS In
is a TTL-compatible digital input used to control the function of the filter/codec.
Three modes of operation may be effected by applying to this input a logic high (V
DD
), logic low
(GNDD), or an 8-bit serial word, depending on the logic states of CA and F1i.
Functions controlled are: powerdown, filter gain adjust, loopback, chip testing, SD outputs.
DSTi
Data ST-BUS In
accepts the incoming 8-bit PCM word. Input is TTL-compatible.
C2i
Clock Input
is a
TTL-compatible 2.048 MHz clock.
DSTo
Data ST-BUS Out
is a three-state digital output driving the PCM bus with the outgoing 8-bit PCM
word.
V
DD
F1i
Positive power Supply
(+5 V).
Synchronization Input
is an active low digital input enabling (in conjunction with CA) the PCM input,
PCM output and digital control input. It is internally sampled on every positive edge of the clock, C2i,
and provides frame and channel synchronization.
CA
Control Address
is a three-level digital input which enables PCM input and output and determines
into which control register (A or B) the serial data, presented to CSTi, is stored.
SD3
System Drive Output
is an
open drain output of an N-channel transistor which has its source tied to
GNDA. Inactive state is open circuit.
System Drive Outputs
are
open drain outputs of N-channel transistors which have their source tied
to GNDD. Inactive state is open circuit.
System Drive Outputs
are
“Totempole“ CMOS outputs switching between GNDD and V
DD
. Inactive
state is logic low.
SD4-5
SD0-2
V
EE
V
X
ANUL
Negative power supply
(-5 V).
Voice Transmit
is the
analog input to the transmit filter.
Auto Null
is used to integrate an internal auto-null signal.
A 0.1
μ
F capacitor must be connected
between this pin and GNDA.
Voice Receive
is the
analog output of the receive filter.
V
R
GNDA
Analog ground
(0 V).
V
Ref
GNDD
Voltage Reference
input to D to A converter.
Digital ground
(0 V).
1
2
3
4
5
6
7
8
9
10
11
12
20
19
18
17
16
15
14
13
20 PIN PDIP/SOIC
CSTi
DSTi
C2i
DSTo
VDD
SD5
SD4
F1i
CA
SD3
GNDD
VRef
GNDA
VR
ANUL
VX
VEE
SD0
SD1
SD2
1
2
3
4
5
6
7
8
9
10
18
17
16
15
14
13
12
11
18 PIN PDIP
CSTi
DSTi
C2i
DSTo
VDD
F1i
CA
SD3
SD2
GNDD
VRef
GNDA
VR
ANUL
VX
VEE
SD0
SD1
MT8960/61/64/65
MT8962/63/66/67
相關(guān)PDF資料
PDF描述
MT8981DP1 ISO-CMOS ST-BUS
MT8981DPR ISO-CMOS ST-BUS
MT8981DPR1 ISO-CMOS ST-BUS
MT8981D-1 ISO-CMOS ST-BUS⑩ FAMILY Digital Switch
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