參數(shù)資料
型號: MT8966AS
廠商: Mitel Networks Corporation
元件分類: Codec
英文描述: Integrated PCM Filter Codec
中文描述: 集成的PCM編解碼器
文件頁數(shù): 10/32頁
文件大小: 607K
代理商: MT8966AS
MT8960/61/62/63/64/65/66/67
Data Sheet
10
Zarlink Semiconductor Inc.
Logic Control Outputs SD0-5
These outputs are directly controlled by the logic states of bits 0-5 in Register B. A logic low (GNDD) in Register B
causes the SD outputs to assume an inactive state. A logic high (V
DD
) in Register B causes the SD outputs to
assume an active state (see Table 3). SD0-2
switch between GNDD and V
DD
and may be used to control
external logic or transistor circuitry, for example, that employed on the line card for performing such functions
as relay drive for application of ringing to line, message waiting indication, etc.
SD3-5
are used primarily to drive external analog circuitry. Examples may include the switching in or out of gain
sections or filter sections (e.g., ring trip filter) (Figure 7).
MT8962/63/66/67 provides all six SD outputs.
MT8960/61/64/65 each packaged in an 18-pin DIP provide only four control outputs, SD0-3.
Figure 6 - Typical Line Termination
BITS 0-2
LOGIC CONTROL OUTPUTS SD
0
-SD
2
0
Inactive state - logic low (GNDD).
1
Active state - logic high (V
DD
).
BIT 3
LOGIC CONTROL OUTPUT SD
3
0
Inactive state - High Impedance.
1
Active state - GNDA.
BITS 4,5
LOGIC CONTROL OUTPUTS SD
4
, SD
5
0
Inactive state - High Impedance.
1
Active state - GNDD.
BIT 7
BIT 6
CHIP TESTING CONTROLS
0
0
Normal operation.
Telephone Set
2 Wire
Analog
Supervision
Protection
Battery
Feed
Ringing
PCM Highway
2W/4W
Converter
MT8960/61
MT8962/63
MT8964/65
MT8966/67
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相關代理商/技術參數(shù)
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