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參數(shù)資料
| 型號： | MT4LDT464AG |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 4 Meg x 64 Nonbuffered DRAM DIMMs(4 M x 64無緩沖動態(tài)RAM雙列直插存儲器模塊) |
| 中文描述： | 4梅格× 64 Nonbuffered內存插槽（4個M × 64無緩沖動態(tài)RAM的雙列直插存儲器模塊） |
| 文件頁數(shù)： | 2/31頁 |
| 文件大?。?/td> | 439K |
| 代理商： | MT4LDT464AG |
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1, 2, 4 Meg x 64 Nonbuffered DRAM DIMMs
DM67.p65 – Rev. 6/98
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1998, Micron Technology, Inc.
2
1, 2, 4 MEG x 64
NONBUFFERED DRAM DIMMs
OBSOLETE
by a column address strobed in by CAS#. Additional col-
umns may be accessed by providing valid column
addresses, strobing CAS# and holding RAS# LOW , thus
executing faster memory cycles. Returning RAS# HIGH
terminates the FAST-PAGE-MODE operation.
EDO PAGE MODE
EDO PAGE MODE, designated by the “X” version, is an
accelerated FAST-PAGE-MODE cycle. The primary advan-
tage of EDO is the availability of data-out even after CAS#
goes back HIGH. EDO provides for CAS# precharge time
(
t
CP) to occur without the output data going invalid. This
elimination of CAS# output control provides for pipeline
READs.
FAST-PAGE-MODE modules have traditionally turned
the output buffers off (High-Z) with the rising edge of
CAS#. EDO-PAGE-MODE DRAMs operate like FAST-
PAGE-MODE DRAMs, except data will remain valid or
become valid after CAS# goes HIGH during READs, pro-
vided RAS# and OE# are held LOW. If OE# is pulsed while
RAS# and CAS# are LOW, data will toggle from valid data
to High-Z and back to the same valid data. If OE# is toggled
or pulsed after CAS# goes HIGH while RAS# remains
LOW, data will transition to and remain High-Z.
During an application, if the DQ outputs are wire OR’d,
OE# must be used to disable idle banks of DRAMs. Alterna-
tively, pulsing WE# to the idle banks during CAS# HIGH
time will also High-Z the outputs. Independent of OE#
control, the outputs will disable after
t
OFF, which is refer-
enced from the rising edge of RAS# or CAS#, whichever
occurs last. (Refer to the 4 Meg x 4 (MT4LC4M4E8) DRAM
data sheet for additional information on EDO functional-
ity.)
SERIAL PRESENCE-DETECT OPERATION
This module family incorporates serial presence-detect
(SPD). The SPD function is implemented using a 2,048-bit
EEPROM. This nonvolatile storage device contains 256
bytes. The first 128 bytes can be programmed by Micron to
identify the module type and various DRAM organizations
and timing parameters. The remaining 128 bytes of storage
are available for use by the customer. System READ/
WRITE operations between the master (system logic) and
the slave EEPROM device (DIMM) occur via a standard IIC
bus using the DIMM’s SCL (clock) and SDA (data) signals,
together with SA(2:0), which provide eight unique DIMM/
EEPROM addresses.
KEY TIMING PARAMETERS
EDO Operating Mode
SPEED
-5
-6
t
RC
84ns
104ns
t
RAC
50ns
60ns
t
PC
20ns
25ns
t
AA
25ns
30ns
t
CAC
t
CAS
8ns
10ns
13/15ns*
15
*8MB DIMM
FPM Operating Mode
SPEED
-6
t
RC
110ns
t
RAC
60ns
t
PC
35ns
t
AA
30ns
t
CAC
15ns
t
RP
40ns
PART NUMBERS
EDO Operating Mode
PART NUMBER
MT4LDT164AG-5 X
MT4LDT164AG-6 X
MT8LD264AG-5 X
MT8LD264AG-6 X
MT16LD464AG-5 X
MT16LD464AG-6 X
CONFIGURATION
1 Meg x 64
1 Meg x 64
2 Meg x 64
2 Meg x 64
4 Meg x 64
4 Meg x 64
SPEED
50ns
60ns
50ns
60ns
50ns
60ns
PACKAGE
TSOP
TSOP
SOJ
SOJ
SOJ
SOJ
FPM Operating Mode
PART NUMBER
MT4LDT164AG-6
MT8LD264AG-6
MT16LD464AG-6
CONFIGURATION
1 Meg x 64
2 Meg x 64
4 Meg x 64
SPEED
60ns
60ns
60ns
PACKAGE
TSOP
SOJ
SOJ
GENERAL DESCRIPTION
The
MT4LDT164A (X),
MT16LD464A(X) are randomly accessed 8MB, 16MB and
32MB memories organized in a x64 configuration. During
READ or WRITE cycles, each bit is uniquely addressed
through the 20/ 21/ 22 address bits, which are entered 10/
11 bits (A0-A10) at RAS# time and 10/ 11 bits (A0-A10) at
CAS# time.
MT8LD264A (X)
and
FAST PAGE MODE
FAST-PAGE-MODE operations allow faster data opera-
tions (READ or WRITE) within a row-address-defined
page boundary. The FAST-PAGE-MODE cycle is always
initiated with a row address strobed in by RAS#, followed
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT4LDT464AG-5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 Fast Page Mode DRAM Module |
| MT4LDT464AG-5X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 EDO Page Mode DRAM Module |
| MT4LDT464AG-6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 Fast Page Mode DRAM Module |
| MT4LDT464AG-6X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 EDO Page Mode DRAM Module |
| MT4LDT464H | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:SMALL-OUTLINE DRAM MODULE |
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