參數(shù)資料
型號(hào): MT49H8M32FM
廠商: Micron Technology, Inc.
英文描述: REDUCED LATENCY DRAM RLDRAM
中文描述: 低延遲DRAM延遲DRAM
文件頁數(shù): 10/43頁
文件大?。?/td> 652K
代理商: MT49H8M32FM
10
256: x16, x32 RLDRAM
MT49H8M32_3.p65 – Rev. 3, Pub. 6/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
ADVANCE
256Mb: x16, x32
2.5V V
EXT
, 1.8V V
DD
, 1.8V V
DD
Q, RLDRAM
MODE REGISTER DESCRIPTION
The address signals A[17:0] are used to set the mode
register.
Mode Register Command Table
NOTE:
1. HSTL-complient current specification
2. Bits A17–A6 MUST be set LOW (Logic 0)
3. Default configuration
4. When Matched Mode is asserted, the automatic I/O impedance calibration is activated
5. Test Mode entry for vendor test mode only
6. The Mode Register Set default configuration corresponds to all address bits equal to zero
RLDRAM
Configuration
Test Mode
I/O Driver
Strength
Matched
Mode
Burst
Length
A17–A7
A6
A5
A4
A3
A2
A1
A0
Address
Mode Register
Commands
Reserved
2
0
1
Burst Length
2
3
4
A3
0
0
0
0
1
1
1
1
RLDRAM
Configuration
3
3
1
2
3
4
5
6
3
A2
0
0
1
1
0
0
1
1
A1
0
1
0
1
0
1
0
1
A0
0
1
Matched Mode
Inactive
3
Active
4
A4
0
1
Driver Strength
1
8mA
3
4mA
A5
0
1
Test Mode
Default Mode
3
Test Mode Entry
A6
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