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| 型號(hào)： | MT46V4M16 |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 1 Meg x 16 x 4 banks DDR SDRAM(1M x 16 x 4組，雙數(shù)據(jù)速率同步動(dòng)態(tài)RAM) |
| 中文描述： | 1梅格× 16 × 4銀行DDR SDRAM內(nèi)存（100萬(wàn)× 16 × 4組，雙數(shù)據(jù)速率同步動(dòng)態(tài)RAM）的 |
| 文件頁(yè)數(shù)： | 52/69頁(yè) |
| 文件大?。?/td> | 2369K |
| 代理商： | MT46V4M16 |
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52
64Mb: x4, x8, x16 DDR SDRAM
64Mx4x8x16DDR_B.p65
–
Rev. B; Pub. 10/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
64Mb: x4, x8, x16
DDR SDRAM
NOTES (continued)
32. V
DD
must not vary more than 4% if CKE is not
active while any bank is active.
33. The clock is allowed up to ±150ps of jitter. Each
timing parameter is allowed to vary by the same
amount.
34.
t
HP (MIN) is the lesser of
t
CL minimum and
t
CH
minimum actually applied to the device CK and
CK/ inputs, collectively during bank active.
35. READs and WRITEs with auto precharge are not
allowed to be issued until
t
RAS (MIN) can be
satisfied prior to the internal precharge com-
mand being issued.
36. Applies to x16 only. First DQS (LDQS or UDQS)
to transition to last DQ (DQ0-DQ15) to
transition valid. Initial JEDEC specifications
suggested this to be same as
t
DQSQ.
37. Normal Output Drive Curves:
a)The full variation in driver pull-down current
from minimum to maximum process, tempera-
ture and voltage will lie within the outer
bounding lines of the V-I curve of Figure A.
b)The variation in driver pull-down current
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure A.
c) The full variation in driver pull-up current
from minimum to maximum process,
temperature and voltage will lie within the
outer bounding lines of the V-I curve of
Figures B.
d)The variation in driver pull-up current within
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within
the inner bounding lines of the V-I curve of
Figure B.
e) The full variation in the ratio of the maximum
to minimum pull-up and pull-down current
should be between .71 and 1.4, for device
drain-to-source voltages from 0.1V to 1.0
Volt, and at the same voltage and tempera-
ture.
f) The full variation in the ratio of the nominal
pull-up to pull-down current should be unity
±10%, for device drain-to-source voltages
from 0.1V to 1.0 Volt.
Figure A
Pull-Dow n Characteristics
0
20
40
60
80
100
120
140
160
0.0
0.5
1.0
1.5
2.0
2.5
V
OUT
(V)
I
O
Figure B
Pull-Up Characteristics
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
0.0
0.5
1.0
1.5
2.0
2.5
V
DD
Q - V
OUT
(V)
I
O
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