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參數(shù)資料
| 型號(hào)： | MRF6V10010NR4 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 功率晶體管 |
| 英文描述： | L BAND, Si, N-CHANNEL, RF POWER, MOSFET |
| 封裝： | ROHS COMPLIANT, PLASTIC, PLD-1.5, CASE 466-03, 4 PIN |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大小： | 642K |
| 代理商： | MRF6V10010NR4 |
MRF6V10010NR4
5
RF Device Data
Freescale Semiconductor
TYPICAL CHARACTERISTICS
50
0.1
100
020
10
VDS, DRAIN--SOURCE VOLTAGE (VOLTS)
Figure 3. Capacitance versus Drain--Source Voltage
C,
CA
PA
CIT
ANCE
(pF
)
30
Ciss
0.1
10
1
TC =25°C
10
1
VDS, DRAIN--SOURCE VOLTAGE (VOLTS)
Figure 4. DC Safe Operating Area
I D
,DRA
IN
CURRE
NT
(A
M
PS
)
10
1
40
Coss
Crss
Measured with ±30 mV(rms)ac @ 1 MHz
VGS =0 Vdc
TJ = 200°C
TJ = 150°C
TJ = 175°C
27
5
50
6
26
25
75
65
60
55
Pout, OUTPUT POWER (WATTS) PULSED
Figure 5. Pulsed Power Gain and Drain Efficiency
versus Output Power
G
ps
,P
OWER
GAIN
(d
B)
η
D,
DRA
IN
EF
FI
CIE
NCY
(%
)
ηD
22
12
Gps
35
45
12
Pin, INPUT POWER (dBm) PULSED
Figure 6. Pulsed Output Power versus
Input Power
40
13
14
15
16
17
19
P out
,O
UT
PU
T
POWER
(d
Bm)
PU
LSED
P3dB = 40.66 dBm (11.65 W)
Actual
Ideal
Figure 7. Pulsed Power Gain versus
Output Power
Pout, OUTPUT POWER (WATTS) PULSED
G
ps
,P
OWER
GAIN
(d
B)
VDD =30 V
17
27
0
25
35 V
23
45 V
212
50 V
24
21
19
VDD =50 Vdc,IDQ = 10 mA, f = 1090 MHz
Pulse Width = 100 μsec, Duty Cycle = 20%
IDQ = 10 mA, f = 1090 MHz
Pulse Width = 100 μsec
Duty Cycle = 20%
40 V
VDD =50 Vdc,IDQ = 10 mA, f = 1090 MHz
Pulse Width = 100 μsec, Duty Cycle = 20%
100
23
789
10
11
70
P1dB = 40.18 dBm
(10.42 W)
18
46
8
10
0
14
0
25_C
85_C
0.01
10
8
Pin, INPUT POWER (WATTS) PULSED
Figure 8. Pulsed Output Power versus
Input Power
P out
,O
UT
PU
T
POWER
(W
ATTS)
PU
LSED 12
TC =--30_C
6
4
2
VDD =50 Vdc
IDQ =10 mA
f = 1090 MHz
Pulse Width = 100 μsec
Duty Cycle = 20%
0.02
0.03
0.04
0.05
0.06
0.07
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