![](http://datasheet.mmic.net.cn/30000/MR80C52CXXX-20SCR_datasheet_2377250/MR80C52CXXX-20SCR_12.png)
12
32142D–06/2013
ATUC64/128/256L3/4U
3.2
See Section 3.3 for a description of the various peripheral signals. the pin types used.
3.2.1
TWI, 5V Tolerant, and SMBUS Pins
Some normal I/O pins offer TWI, 5V tolerance, and SMBUS features. These features are only
available when either of the TWI functions or the PWMAOD function in the PWMA are selected
for these pins.
of the TWI, 5V tolerance, and SMBUS pins.
57
PB15
47
VDDIO
High-
drive I/O
ABDACB-
CLK
IISC-
IMCK
SPI-SCK
TC0-CLK2
PWMA-
PWMA[8]
SCIF-
GCLK[3]
CAT-
CSB[4]
58
PB16
48
VDDIO
Normal
I/O
ABDACB-
DAC[0]
IISC-ISCK
USART0-
TXD
PWMA-
PWMA[9]
SCIF-
GCLK[2]
CAT-
CSA[5]
59
PB17
49
VDDIO
Normal
I/O
ABDACB-
DAC[1]
IISC-IWS
USART0-
RXD
PWMA-
PWMA[10]
CAT-
CSB[5]
60
PB18
50
VDDIO
Normal
I/O
ABDACB-
DACN[0]
IISC-ISDI
USART0-
RTS
PWMA-
PWMA[12]
CAT-
CSA[0]
4
PB19
51
VDDIO
Normal
I/O
ABDACB-
DACN[1]
IISC-ISDO
USART0-
CTS
PWMA-
PWMA[20]
EIC-
EXTINT[1]
CAT-
CSA[12]
5
PB20
52
VDDIO
Normal
I/O
TWIMS1-
TWD
USART2-
RXD
SPI-
NPCS[1]
TC0-A0
PWMA-
PWMA[21]
USART1-
RTS
USART1-
CLK
CAT-
CSA[14]
40
PB21
53
VDDIO
Normal
I/O
TWIMS1-
TWCK
USART2-
TXD
SPI-
NPCS[2]
TC0-B0
PWMA-
PWMA[28]
USART1-
CTS
USART1-
CLK
CAT-
CSB[14]
41
PB22
54
VDDIO
Normal
I/O
TWIMS1-
TWALM
SPI-
NPCS[3]
TC0-CLK0
PWMA-
PWMA[27]
ADCIFB-
TRIGGER
SCIF-
GCLK[0]
CAT-
CSA[8]
54
PB23
55
VDDIO
Normal
I/O
SPI-MISO
USART2-
RTS
USART2-
CLK
TC0-A2
PWMA-
PWMA[0]
CAT-SMP
SCIF-
GCLK[6]
CAT-
CSA[4]
55
PB24
56
VDDIO
Normal
I/O
SPI-MOSI
USART2-
CTS
USART2-
CLK
TC0-B2
PWMA-
PWMA[1]
ADCIFB-
ADP[1]
SCIF-
GCLK[7]
CAT-
CSA[2]
61
PB25
57
VDDIO
Normal
I/O
SPI-
NPCS[0]
USART1-
RXD
TC0-A1
PWMA-
PWMA[2]
SCIF-
GCLK_IN[
2]
SCIF-
GCLK[8]
CAT-
CSA[3]
21
PB26
58
VDDIO
Normal
I/O
SPI-SCK
USART1-
TXD
TC0-B1
PWMA-
PWMA[3]
ADCIFB-
ADP[0]
SCIF-
GCLK[9]
CAT-
CSB[3]
24
PB27
59
VDDIN
Normal
I/O
USART1-
RXD
TC0-CLK1
PWMA-
PWMA[4]
ADCIFB-
ADP[1]
EIC-
NMI
(EXTINT[0])
CAT-
CSA[9]
Table 3-1.
GPIO Controller Function Multiplexing