參數(shù)資料
型號(hào)： MQ80C52TXXX-12SB
廠商： TEMIC SEMICONDUCTORS
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44
文件頁(yè)數(shù)： 14/46頁(yè)
文件大?。?/td> 4720K
代理商： MQ80C52TXXX-12SB
20
ATtiny20 [DATASHEET]
8235E–AVR–03/2013
Table 6-1.
Start-up Times when Using the Internal Calibrated Oscillator
Notes: 1. After powering up the device or after a reset the system clock is automatically set to calibrated internal 8
MHz oscillator, divided by 8
2. When the Brown-out Detection is enabled, the reset start-up time is 128 ms after powering up the device.
6.4.2
Starting from Power-Down Mode
When waking up from Power-Down sleep mode, the supply voltage is assumed to be at a sufficient level and only the
oscillator start-up time is counted to ensure the stable operation of the oscillator. The oscillator start-up time is counted
on the selected main clock, and the start-up time depends on the clock selected. See Table 6-2 for details.
Table 6-2.
Start-up Time from Power-Down Sleep Mode
Notes: 1. The start-up time is measured in main clock oscillator cycles.
2. When using software BOD disable, the wake-up time from sleep mode will be approximately 60 μs.
6.4.3
Starting from Idle / ADC Noise Reduction / Standby Mode
When waking up from Idle, ADC Noise Reduction or Standby Mode, the oscillator is already running and no oscillator
start-up time is introduced.
6.5
Register Description
6.5.1
CLKMSR – Clock Main Settings Register
Bits 7:2 – Res: Reserved Bits
These bits are reserved and will always read as zero.
Bits 1:0 – CLKMS[1:0]: Clock Main Select Bits
These bits select the main clock source of the system. The bits can be written at run-time to switch the source of the main
clock. The clock system ensures glitch free switching of the main clock source.
The main clock alternatives are shown in Table 6-3.
Reset
Oscillator
Configuration
Total start-up time
64 ms
6 cycles
21 cycles
64 ms + 6 oscillator cycles + 21 system clock cycles (1)(2)
Oscillator start-up time
Total start-up time
6 cycles
6 oscillator cycles (1)(2)
Bit
765432
1
0
–
CLKMS1
CLKMS0
CLKMSR
Read/Write
R
R/W
Initial Value
0
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