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8111C–MCU Wireless–09/09
AT86RF231
Note:
If ANT_DIV_EN = 1 register bit ANT_EXT_SW_EN shall be set to 1, too. This is not automatically
done by the hardware.
Bit 2 - ANT_EXT_SW_EN
If enabled, pin 9 (DIG1) and pin 10 (DIG2) become output pins and provide a differential control
signal for an Antenna Diversity switch. The selection of a specific antenna is done either by the
automated Antenna Diversity algorithm (ANT_DIV_EN = 1), or according to register bits
ANT_CTRL if Antenna Diversity algorithm is disabled.
Do not enable Antenna Diversity RF switch control (ANT_EXT_SW_EN = 1) and RX Frame
If the register bit is set the control pins DIG1/DIG2 are activated in all radio transceiver states as
long as register bit ANT_EXT_SW_EN is set. If the AT86RF231 is not in a receive or transmit
state, it is recommended to disable register bit ANT_EXT_SW_EN to reduce the power con-
sumption or avoid leakage current of an external RF switch, especially during SLEEP state. If
register bit ANT_EXT_SW_EN = 0, output pins DIG1 and DIG2 are pulled-down to digital
ground.
Note:
If ANT_EXT_SW_EN = 0, register bit ANT_DIV_EN shall be set to 0 and register bits ANT_CTRL
to 3. This is not automatically done by the hardware.
Bit [1:0] - ANT_CTRL
These register bits provide a static control of an Antenna Diversity switch. Setting
ANT_DIV_EN = 0 (Antenna Diversity disabled), this register setting defines the selected
antenna. Although it is possible to change register bits ANT_CTRL in state TRX_OFF, this
change will be effective at pins DIG1 and DIG2 in state PLL_ON as well as all receive and trans-
mit states.
Table 11-12. Antenna Diversity Control
Register Bit
Value
Description
ANT_DIV_EN
0
Antenna Diversity algorithm disabled
1
Antenna Diversity algorithm enabled
Table 11-13. Antenna Diversity RF Switch Enable
Register Bit
Value
Description
ANT_EXT_SW_EN
0
Antenna Diversity RF Switch Control disabled
1
Antenna Diversity RF Switch Control enabled
Table 11-14. Antenna Diversity Switch Control
Register Bit
Value
Description