- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98028 > MPM22CUC450B (INTEL CORP) 32-BIT, 450 MHz, MICROPROCESSOR, XMA PDF資料下載
參數(shù)資料
| 型號(hào)： | MPM22CUC450B |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 450 MHz, MICROPROCESSOR, XMA |
| 封裝： | MMC-2 |
| 文件頁數(shù)： | 28/64頁 |
| 文件大?。?/td> | 778K |
| 代理商： | MPM22CUC450B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
Pentium
III Processor Mobile Module MMC-2
28
Datasheet
245304-004
5.0
Electrical Specifications
The following section provides the electrical specifications for the Pentium III processor mobile
module.
5.1
System Bus Clock Signal Quality Specifications
The HCLK0 and BCLK signal names are used interchangeably.
5.1.1
BCLK DC Specifications
NOTE: VILX,min and VIH,max only apply when BCLK is stopped. BCLK should be stopped in the low state. See
Table 18 for the BCLK voltage range specifications when BCLK is running.
5.1.2
BCLK AC Specifications
NOTES:
1. All AC timings for GTL+ and CMOS signals are referenced to the BCLK rising edge at 1.25V. All CMOS
signals are referenced at 0.75V.
2. The internal core clock frequency is derived from the PSB clock. The PSB clock to core clock ratio is
determined during initialization and is predetermined by the Intel mobile module. The BCLK period allows a
+0.5 nS tolerance for clock driver variation.
3. This value is measured on the rising edge of adjacent BCLKs at 1.25V. The jitter present must be accounted
for as a component of BCLK skew between devices.
4. The clock driver’s closed loop jitter bandwidth must be set low to allow any PLL-based device to track the
jitter created by the clock driver. The -20.0 dB attenuation point, as measured into a 10.0-pF to a 2.0-pF load,
should be less than 500 kHz. This specification may be ensured by design characterization and/or measured
with a spectrum analyzer. See the CK97 Clock Synthesizer/Driver Specification (OR-1089) for further details.
5. These values are not 100% tested and are specified by design characterization as a clock driver
requirement.
6. Specifications labeled N/A are not available.
Table 17. BCLK DC Specifications
Symbol
Parameter
Min
Max
Unit
VIL,BCLK
Input Low Voltage, BCLK
- 0.3
0.5
V
VIH,BCLK
Input High Voltage, BCLK
2.0
2.625
V
Table 18. BCLK AC Specifications at the Processor Core Pins
T#
Parameter
Min
Nom
Max
Unit
Note
System Bus Frequency
N/A
100.0
N/A
MHz
Notes 5, 6
BCLK Period
N/A
10.0
N/A
nS
Notes 2, 5, 6
BCLK Period Stability
N/A
± 250
pS
Notes 3, 4, 5, 6
T3:
BCLK High Time
2.85
N/A
nS
At > 1.7V, Notes 5, 6
T4:
BCLK Low Time
2.55
N/A
nS
At > 0.7V, Notes 5, 6
T5:
BCLK Rise Time
0.175
N/A
0.875
nS
0.9V ~ 1.6V, Notes 5, 6
T6:
BCLK Fall Time
0.175
N/A
0.875
nS
1.6V ~ 0.9V, Notes 5, 6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPQ2222 | 0.5 A, 30 V, 4 CHANNEL, NPN, Si, POWER TRANSISTOR, TO-116 |
| MPQ2222A | 0.5 A, 40 V, 4 CHANNEL, NPN, Si, POWER TRANSISTOR, TO-116 |
| MPQ2484 | 50 mA, 40 V, 4 CHANNEL, NPN, Si, SMALL SIGNAL TRANSISTOR, TO-116 |
| MPQ2483 | 50 mA, 40 V, 4 CHANNEL, NPN, Si, SMALL SIGNAL TRANSISTOR, TO-116 |
| MPQ2907A | 0.6 A, 60 V, 4 CHANNEL, PNP, Si, POWER TRANSISTOR, TO-116 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPM-25S | 制造商:MPD 制造商全稱:MicroPower Direct, LLC 功能描述:Universal Input, 25W Miniature, PC Mount AC/DC Power Supplies |
| MPM-25S-05 | 制造商:MPD 制造商全稱:MicroPower Direct, LLC 功能描述:Universal Input, 25W Miniature, PC Mount AC/DC Power Supplies |
| MPM-25S-12 | 制造商:MPD 制造商全稱:MicroPower Direct, LLC 功能描述:Universal Input, 25W Miniature, PC Mount AC/DC Power Supplies |
| MPM-25S-15 | 制造商:MPD 制造商全稱:MicroPower Direct, LLC 功能描述:Universal Input, 25W Miniature, PC Mount AC/DC Power Supplies |
| MPM-25S-24 | 制造商:MPD 制造商全稱:MicroPower Direct, LLC 功能描述:Universal Input, 25W Miniature, PC Mount AC/DC Power Supplies |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。