參數(shù)資料
型號(hào)： MPM22CUC450B
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 450 MHz, MICROPROCESSOR, XMA
封裝： MMC-2
文件頁(yè)數(shù)： 19/64頁(yè)
文件大?。?/td> 778K
代理商： MPM22CUC450B
Pentium
III Processor Mobile Module MMC-2
20
Datasheet
245304-004
4.0
Functional Description
4.1
Pentium III Processor Mobile Module MMC-2
The mobile Pentium III processor core runs at speeds of 450 MHz and 500 MHz with a 100-MHz
PSB.
4.2
L2 Cache
The on-die L2 cache has 256 KB, is eight-way set associative, and runs at the speed of the
processor core.
4.3
The 82443BX Host Bridge System Controller
Intel’s 82443BX Host Bridge system controller is a highly integrated device that combines the bus
controller, the DRAM controller, and the PCI bus controller into one component. The 82443BX
Host Bridge has multiple power management features designed specifically for notebook systems
such as:
CLKRUN#, a feature that enables controlling of the PCI clock on or off.
The 82443BX Host Bridge suspend modes, which include Suspend-To-RAM (STR), Suspend-
To-Disk (STD), and Power-On-Suspend (POS).
System Management RAM (SMRAM) power management modes, which include Compatible
SMRAM (C_SMRAM) and Extended SMRAM (E_SMRAM). C_SMRAM is the traditional
SMRAM feature implemented in all Intel PCI chipsets. E_SMRAM is a new feature that
supports write-back cacheable SMRAM space up to 1 MB. To minimize power consumption
while the system is idle, the internal 82443BX Host Bridge clock is turned off (gated off) when
there is no processor and PCI activity. This is accomplished by setting the G_CLK enable bit
in the power management register in the 82443BX through the system BIOS.
4.3.1
Memory Organization
The memory interface of the 82443BX Host Bridge is available at connector. This allows for the
following:
One set of memory control signals, sufficient to support up to three SO-DIMM sockets and six
banks of SDRAM at 100 MHz.
One CKE signal for each bank.
Memory features not supported by the 82443BX Host Bridge system controller standard MMC-2
mode are:
Eight banks of memory
256-Mb memory devices
Second set of memory address lines (MAA[13:0])
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