參數(shù)資料
型號(hào)： MPC8241LZQ266B
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 266 MHz, RISC PROCESSOR, PBGA357
封裝： 25 X 25 MM, 1.27 MM HEIGHT, PLASTIC, BGA-357
文件頁(yè)數(shù)： 41/60頁(yè)
文件大?。?/td> 730K
代理商： MPC8241LZQ266B
46
MPC8241 Integrated Processor Hardware Specifications
MOTOROLA
System Design Information
Any other unused active low input pins should be tied to a logic-one level via weak pull-up resistors
(2–10 k
) to the appropriate power supply listed in Table 17. Unused active high input pins should be tied
to GND via weak pull-down resistors (2–10 k
).
1.7.5
PCI Reference Voltage—LVDD
The MPC8241 PCI reference voltage (LVDD) pins should be connected to 3.3 ± 0.3 V power supply if
interfacing the MPC8241 into a 3.3-V PCI bus system. Similarly, the LVDD pins should be connected to
5.0 V ± 5% power supply if interfacing the MPC8241 into a 5-V PCI bus system. For either reference
voltage, the MPC8241 always performs 3.3-V signaling as described in the PCI Local Bus Specification
(Rev. 2.2). The MPC8241 tolerates 5-V signals when interfaced into a 5-V PCI bus system. (See Errata
No. 18 in the MPC8245/MPC8241 Integrated Processor Chip Errata).
1.7.6
JTAG Configuration Signals
Boundary scan testing is enabled through the JTAG interface signals. The TRST signal is optional in the
IEEE 1149.1 specification, but is provided on all processors that implement the PowerPC architecture.
While it is possible to force the TAP controller to the reset state using only the TCK and TMS signals, more
reliable power-on reset performance will be obtained if the TRST signal is asserted during power-on reset.
Because the JTAG interface is also used for accessing the common on-chip processor (COP) function,
simply tying TRST to HRESET is not practical.
The COP function of these processors allows a remote computer system (typically, a PC with dedicated
hardware and debugging software) to access and control the internal operations of the processor. The COP
interface connects primarily through the JTAG port of the processor, with some additional status monitoring
signals. The COP port requires the ability to independently assert HRESET or TRST in order to fully control
the processor. If the target system has independent reset sources, such as voltage monitors, watchdog timers,
power supply failures, or push-button switches, then the COP reset signals must be merged into these signals
with logic.
The arrangement shown in Figure 28 allows the COP to independently assert HRESET or TRST, while
ensuring that the target can drive HRESET as well. If the JTAG interface and COP header will not be used,
TRST should be tied to HRESET so that it is asserted when the system reset signal (HRESET) is asserted
ensuring that the JTAG scan chain is initialized during power-on.
The COP header shown in Figure 28 adds many benefits—breakpoints, watchpoints, register and memory
examination/modification, and other standard debugger features are possible through this interface—and
can be as inexpensive as an unpopulated footprint for a header to be added when needed.
The COP interface has a standard header for connection to the target system, based on the 0.025"
square-post, 0.100" centered header assembly (often called a Berg header).
There is no standardized way to number the COP header shown in Figure 28; consequently, many different
pin numbers have been observed from emulator vendors. Some are numbered top-to-bottom then
left-to-right, while others use left-to-right then top-to-bottom, while still others number the pins counter
clockwise from pin 1 (as with an IC). Regardless of the numbering, the signal placement recommended in
Figure 28 is common to all known emulators.
相關(guān)PDF資料
PDF描述
MPC8241LVR200B 32-BIT, 200 MHz, RISC PROCESSOR, PBGA357
MPC8245ARZU400D 32-BIT, 400 MHz, RISC PROCESSOR, PBGA352
MPC8245ARZU466D 32-BIT, 466 MHz, MICROPROCESSOR, PBGA352
MPC8245LVV333D 32-BIT, 333 MHz, RISC PROCESSOR, PBGA352
MPC8245LVV350D 32-BIT, 350 MHz, RISC PROCESSOR, PBGA352
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8241LZQ266D 功能描述:微處理器 - MPU 266MHz 266MIPS RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8241TVR166D 功能描述:微處理器 - MPU INTEGRATED HOST PROC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8241TVR200D 功能描述:微處理器 - MPU INTEGRATED HOST PROC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8241TZP166C 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Intergrated Processor Hardware Specifications
MPC8241TZP200C 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Intergrated Processor Hardware Specifications
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*