參數(shù)資料
型號(hào)： MPC745BPX350LE
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 350 MHz, RISC PROCESSOR, PBGA255
封裝： 21 X 21 MM, PLASTIC, BGA-255
文件頁(yè)數(shù)： 3/52頁(yè)
文件大?。?/td> 1276K
代理商： MPC745BPX350LE
MOTOROLA
MPC755 RISC Microprocessor Hardware Specifications
11
Electrical and Thermal Characteristics
1.4.2
AC Electrical Characteristics
This section provides the AC electrical characteristics for the MPC755. After fabrication, functional parts
are sorted by maximum processor core frequency as shown in Section 1.4.2.1, “Clock AC Specifications,”
and tested for conformance to the AC specifications for that frequency. The processor core frequency is
determined by the bus (SYSCLK) frequency and the settings of the PLL_CFG[0:3] signals. Parts are sold
by maximum processor core frequency; see Section 1.10, “Ordering Information.”
1.4.2.1
Clock AC Specifications
Table 8 provides the clock AC timing specifications as defined in Figure 3.
Nap Mode
Maximum
1.0
W
1, 2
Sleep Mode
Maximum
460
470
mW
1, 2
Sleep Mode (PLL and DLL Disabled)
Typical
340
mW
1, 3
Maximum
430
mW
1, 2
Notes:
1. These values apply for all valid processor bus and L2 bus ratios. The values do not include I/O supply power
(OVDD and L2OVDD) or PLL/DLL supply power (AVDD and L2AVDD). OVDD and L2OVDD power is system
dependent, but is typically <10% of VDD power. Worst case power consumption for AVDD = 15 mW and L2AVDD
=15 mW.
2. Maximum power is measured at nominal VDD (see Table 4) while running an entirely cache-resident, contrived
sequence of instructions which keep the execution units, with or without AltiVec, maximally busy.
3. Typical power is an average value measured at the nominal recommended VDD (see Table 3) and 65°C in a
system while running a typical code sequence.
Table 8. Clock AC Timing Specifications
At recommended operating conditions (see Table 3)
Characteristic
Symbol
Maximum Processor Core Frequency
Unit
Notes
300 MHz
350 MHz
400 MHz
450 MHz
Min
Max
Min
Max
Min
Max
Min
Max
Processor frequency
fcore
200
300
200
350
200
400
200
450
MHz
1
VCO frequency
fVCO
400
600
400
700
400
800
400
900
MHz
1
SYSCLK frequency
fSYSCLK
25
100
25
100
25
100
25
100
MHz
1
SYSCLK cycle time
tSYSCLK
10
40
10
40
10
40
10
40
ns
SYSCLK rise and fall
time
tKR, tKF
—2.0
ns
2
tKR, tKF
—1.4
ns
2
SYSCLK duty cycle
measured at OVDD/2
tKHKL/
tSYSCLK
40
60
40
60
40
60
40
60
%
3
Table 7. Power Consumption for MPC755 (continued)
Processor (CPU) Frequency
Unit
Notes
300 MHz
350 MHz
400 MHz
450 MHz
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