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參數(shù)資料
| 型號： | MPC603EFEX266LX |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 266 MHz, RISC PROCESSOR, CQFP240 |
| 封裝： | 32 X 32 MM, 0.50 MM PITCH, CERAMIC, QFP-240 |
| 文件頁數(shù)： | 27/32頁 |
| 文件大?。?/td> | 498K |
| 代理商： | MPC603EFEX266LX |
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PID6-603e Hardware Specifications, Rev 2
Integrated power management
— Low-power 3.3-volt design
— Internal processor/bus clock multiplier that provides 1/1, 1.5/1, 2/1, 2.5/1, 3/1, 3.5/1, and 4/1
ratios
— Three power saving modes: doze, nap, and sleep
— Automatic dynamic power reduction when internal functional units are idle
In-system testability and debugging features through JTAG boundary-scan capability
1.3 General Parameters
The following list provides a summary of the general parameters of the 603e.
Technology
0.5 CMOS, four-layer metal
Die size
11.67 mm x 8.4 mm (98 mm
2)
Transistor count
2.6 million
Logic design
Fully-static
Package
Surface mount 240-pin ceramic quad at pack (CQFP)
or 255-pin ceramic ball grid array (CBGA)
Power supply
3.3 ± 5% V dc
1.4 Electrical and Thermal Characteristics
This section provides the AC and DC electrical specications and thermal characteristics for the 603e.
1.4.1 DC Electrical Characteristics
The tables in this section describe the 603e DC electrical characteristics. Table 1 provides the absolute
maximum ratings.
Table 1. Absolute Maximum Ratings
Characteristic
Symbol
Value
Unit
Core supply voltage
Vdd
–0.3 to 4.0
V
PLL supply voltage
AVdd
–0.3 to 4.0
V
I/O supply voltage
OVdd
–0.3 to 4.0
V
Input voltage
Vin
–0.3 to 5.5
V
Storage temperature range
Tstg
–55 to 150
°C
Notes:
1. Functional operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and
functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device
reliability or cause permanent damage to the device.
2. Caution: Vin must not exceed OVdd by more than 2.5 V at any time including during power-on reset.
3. Caution: OVdd must not exceed Vdd/AVdd by more than 2.5 V at any time including during power-on reset.
4. Caution: Vdd/AVdd must not exceed OVdd by more than 0.4 V at any time including during power-on reset.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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