- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369923 > MPC555 (Motorola, Inc.) Highly Integrated, Low-Power, 32-Bit Microcontroller PDF資料下載
參數(shù)資料
| 型號： | MPC555 |
| 廠商： | Motorola, Inc. |
| 元件分類： | 32位微控制器 |
| 英文描述： | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| 中文描述： | 高度集成，低功耗，32位微控制器 |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 219K |
| 代理商： | MPC555 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
Application Note
AN1778
18
MOTOROLA
Table 3. MPWMSMSCR Bit Settings
Bit(s)
Name
Description
0
PIN
Pin input status. The PIN bit reflects the state present on the MPWMSM pin. The
software can thus monitor the signal on the pin.
The PIN bit is a read-only bit. Writing to the PIN bit has no effect.
1
DDR
Data direction register. The DDR bit indicates the direction for the pin when the PWM
function is not used (disable mode). Note that when the PWM function is used, the
DDR bit has no effect.
0 = Pin is an input.
1 = Pin is an output.
2
FREN
Freeze enable. This active high read/write control bit enables the MPWMSM to
recognize the freeze signal on the MIOB.
0 = MPWMSM is not frozen even if the MIOB freeze line is active.
1 = MPWMSM is frozen if the MIOB freeze line is active.
3
TRSP
Transparent mode. The TRSP bit indicates that the MPWMSM double buffers are
transparent: when the software writes to either the MPWMA or MPWMB1 register
the value written is immediately transferred to respectively the counter or register
MPWMB2.
0 = Transparent mode deactivated.
1 = Transparent mode activated.
4
POL
Output polarity control. The POL bit works in conjunction with the EN bit and controls
whether the MPWMSM drives the pin with the true or the inverted value of the output
flip-flop
5
EN
Enable PWM signal generation. The EN bit defines whether the MPWMSM generates
a PWM signal or is used as an I/O channel:
0 = PWM generation is disabled (pin can be used as I/O).
1 = PWM generation is enabled (pin is output only).
6:7
—
Reserved
8:15
CP
Clock prescaler. This 8-bit read/write register stores the twos complement of the
desired modulus value for loading into the built-in 8-bit clock prescaler. The value
loaded defines the divide ratio for the signal that clocks the MPWMSM period
counter.
Table 4
gives the clock divide ratio according to the CP values.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC561 | RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options |
| MPC561MZP56 | RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options |
| MPC562 | RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options |
| MPC562MZP56 | RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options |
| MPC563 | RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC5553 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Data Sheet |
| MPC5553_07 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Data Sheet |
| MPC5553AVF112 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5553AVF112R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5553AVF132 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。