參數(shù)資料
型號(hào): MPC555
廠商: Motorola, Inc.
元件分類: 32位微控制器
英文描述: Highly Integrated, Low-Power, 32-Bit Microcontroller
中文描述: 高度集成,低功耗,32位微控制器
文件頁(yè)數(shù): 15/32頁(yè)
文件大小: 219K
代理商: MPC555
Application Note
Using the MPC555 as a Signal Generator
AN1778
MOTOROLA
15
comment that line out of the initialization code (see
Initializing the EVB
)
andpower-onresettheevaluationboardsothattheIMBbusisoperating
at 20 MHz.)
The next step is to set up the MIOS counter.
The MIOS counter prescaler submodule (MCPSM) is controlled by the
MCPSM status/control register. The information in
Figure 5
explains the
bit assignments for the status/control register.
Figure 5. MCPSM Status/Control Register (MCPSMSCRT) 0x30 6816
The bit settings are explained in
Table 2
.
MSB
0
PREN FREN
RESET:
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
LSB
15
RESERVED
PSL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 2. MCPSMSCR Bit Settings
Bit(s)
Name
Description
0
PREN
Prescaler enable. This active high read/write control bit enables the MCPSM counter. The
PREN bit is cleared by reset.
0 = MCPSM counter disabled
1 = MCPSM counter enabled
1
FREN
Freeze enable. When set, this active high read/write control bit makes possible a freeze of
the MCPSM counter if the MIOB freeze line is activated. Note that this line is active when
the MIOS1MCR STOP bit is set or when the MIOS1MCR FREN bit and the IMB3
FREEZE line are set.
When the MCPSM is frozen, it stops counting. Then when the FREN bit is reset or when
the freeze condition on the MIOB is negated, the counter restarts from where it was
before being frozen. The FREN bit is cleared by reset.
0 = MCPSM counter not frozen
1 = Selectively stops MIOS1 operation when the FREEZE signal appears on the IMB3
2:11
Reserved
12:15
PSL
Clock prescaler. This 4-bit read/write data register stores the modulus value for loading
into the clock prescaler. The new value is loaded into the counter the next time the
counter equals one or when disabled (PREN bit = 0). Divide ratios are as follows:
0000 = 16
0001 = No counter clock output
0010 = 2
0011 = 3
.
.
.
1110 = 14
1111 = 15
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