參數(shù)資料
型號(hào): MPC106ARX83TG
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, CBGA304
封裝: 21 X 25 MM, 3.16 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-304
文件頁(yè)數(shù): 6/32頁(yè)
文件大小: 451K
代理商: MPC106ARX83TG
14
Tsi106 PowerPC Host Bridge Hardware Specifications Manual
80C1000_MA002_02
Electrical and Thermal Characteristics
Figure 3. Input Timing Diagram
Figure 4 provides the mode select input timing diagram for the Tsi106.
Figure 4. Mode Select Input Timing Diagram
1.4.2.3 Output AC Specifications
Table 8 provides the output AC timing specifications for Tsi106 (shown in Table 5). Assume Vdd = AVdd
= 3.3 ± 5% V DC, GND = 0 V DC, CL = 50 pF, and 0
T
j 105C. Processor and memory interface
signals are specified from the rising edge of the 60x bus clock (which is internally synchronized to
SYSCLK). All units are nanoseconds.
11a
VM
60x Bus Clock
10a
11b
VM
VM = Midpoint Voltage (1.4 V)
SYSCLK
10b
Group I, II, III,
Group V and
and IV INPUTS
VI INPUTS
VM
VM = Midpoint Voltage (1.4 V)
HRST
11c
MODE PINS
10c
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