- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45337 > MPC106ARX83TG PCI BUS CONTROLLER, CBGA304 PDF資料下載
參數(shù)資料
| 型號： | MPC106ARX83TG |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, CBGA304 |
| 封裝： | 21 X 25 MM, 3.16 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-304 |
| 文件頁數(shù)： | 5/32頁 |
| 文件大?。?/td> | 451K |
| 代理商： | MPC106ARX83TG |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
Tsi106 PowerPC Host Bridge Hardware Specifications Manual
13
80C1000_MA002_02
Electrical and Thermal Characteristics
Figure 3 provides the input timing diagram for the Tsi106.
Table 7. Input AC Timing Specifications
Num
Characteristic
66 MHz
83.3 MHz
Unit
Notes
Min
Max
Min
Max
10a
Group I input signals valid to 60x Bus Clock (input setup)
4.0
3.5
ns
1,2,3
10a
Group II input signals valid to 60x Bus Clock (input setup)
3.5
ns
1,2,4
10a
Group III input signals valid to 60x Bus Clock (input setup)
3.0
2.5
ns
1,2,5
10a
Group IV input signals valid to 60x Bus Clock (input setup)
5.0
4.0
ns
1,2,6
10b
Group V input signals valid to SYSCLK (input setup)
7.0
ns
7,8
10b
Group VI input signals valid to SYSCLK (input setup)
7.0
ns
7,9
11a
60x Bus Clock to group I–IV inputs invalid (input hold)
0
—
0
—
ns
3,4,5,6
11b
SYSCLK to group V–VI inputs invalid (input hold)
–0.5
—
–0.5
—
ns
8,9
HRST pulse width
255 x
tsysclk +
100 s
—
255 x
tsysclk +
100 s
——
10c
Mode select inputs valid to HRST (input setup)
3 x tsysclk
—
3 x tsysclk
—
ns
10,
11,12
11c
HRST to mode select input invalid (input hold)
1.0
—
1.0
—
ns
10, 12
Notes:
1 Input specifications are measured from the TTL level (0.8 or 2.0 V) of the signal in question to the 1.4 V of the rising edge of
SYSCLK. Both input and output timings are measured at the pin (see Figure 3).
2 Processor and memory interface signals are specified from the rising edge of the 60x bus clock (which is internally
synchronized to SYSCLK).
3 Group I input signals include the following processor, L2, and memory interface signals: A[0–31], PAR[0–7]/AR[1–8],
BR[0–4], BRL2, XATS, LBCLAIM, ADS, BA0, TV and HIT (when configured for external L2)
4 Group II input signals include the following processor and memory interface signals: TBST, TT[0–4], TSIZ[0–2], WT, CI,
GBL, AACK, and TA.
5 Group III input signals include the following processor and memory interface signals: DL[0–31] and DH[0–31].
6 Group IV input signals include the following processor and L2 interface signals: TS, ARTRY, DIRTY_IN, and HIT (when
configured for internal L2 controller).
7 PCI 3.3 V signaling environment signals are measured from 1.65 V (Vdd ÷ 2) on the rising edge of SYSCLK to V
OH =3.0 V
or VOL = 0.3 V. PCI 5 V signaling environment signals are measured from 1.65 V (Vdd ÷ 2) on the rising edge of SYSCLK to
VOH = 2.4 V or VOL =0.55V.
8 Group V input signals include the following bussed PCI interface signals: FRAME, C/BE[0–3], AD[0–31], DEVSEL, IRDY,
TRDY, STOP, PAR, PERR, SERR, LOCK, FLSHREQ, and ISA_MASTER.
9 Group VI input signal is the point-to-point PCI GNT input signal.
10 The setup and hold time is with respect to the rising edge of HRST (see Figure 4). Mode select inputs include the RCS0, FOE,
and DBG0 configuration inputs.
11 t
sysclk is the period of the external clock (SYSCLK) in nanoseconds (ns). When the unit is given as tsysclk, the numbers given
in the table must be multiplied by the period of SYSCLK to compute the actual time duration (in nanoseconds) of the parameter
in question.
12 These values are guaranteed by design and are not tested.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC106ARX83DG | PCI BUS CONTROLLER, CBGA304 |
| MPC106ARX66CG | PCI BUS CONTROLLER, CBGA304 |
| MPC5200BV400 | 400 MHz, MICROPROCESSOR, PBGA272 |
| MPC5200CBV266R2 | 266 MHz, MICROPROCESSOR, PBGA272 |
| MPC5200CBV266BR2 | 266 MHz, MICROPROCESSOR, PBGA272 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC-108 | 制造商:Greenlee Textron Inc 功能描述:Unspecified Tools & Accessories ADAPTER,MATING BULKHEAD |
| MPC108100J | 功能描述:厚膜電阻器 - 透孔 MPC10 10R 5% RoHS:否 制造商:Caddock 電阻:27 kOhms 容差:1 % 功率額定值:8 W 溫度系數(shù):50 PPM / C 系列:MS 端接類型:Axial 電壓額定值:2 kV 工作溫度范圍:- 15 C to + 275 C 尺寸:8.89 mm Dia. x 23.11 mm L 封裝:Bulk |
| MPC108101J | 制造商:TE Connectivity 功能描述:RESISTOR 10 WATT 100R 5% |
| MPC108102J | 功能描述:厚膜電阻器 - 透孔 MPC10 1K0 5% RoHS:否 制造商:Caddock 電阻:27 kOhms 容差:1 % 功率額定值:8 W 溫度系數(shù):50 PPM / C 系列:MS 端接類型:Axial 電壓額定值:2 kV 工作溫度范圍:- 15 C to + 275 C 尺寸:8.89 mm Dia. x 23.11 mm L 封裝:Bulk |
| MPC108103J | 功能描述:厚膜電阻器 - 透孔 MPC10 10K 5% RoHS:否 制造商:Caddock 電阻:27 kOhms 容差:1 % 功率額定值:8 W 溫度系數(shù):50 PPM / C 系列:MS 端接類型:Axial 電壓額定值:2 kV 工作溫度范圍:- 15 C to + 275 C 尺寸:8.89 mm Dia. x 23.11 mm L 封裝:Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。