參數(shù)資料
型號: MPC106ARX83DG
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, CBGA304
封裝: 21 X 25 MM, 3.16 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-304
文件頁數(shù): 8/32頁
文件大?。?/td> 451K
代理商: MPC106ARX83DG
16
Tsi106 PowerPC Host Bridge Hardware Specifications Manual
80C1000_MA002_02
Electrical and Thermal Characteristics
Figure 5 provides the output timing diagram for the Tsi106.
Figure 5. Output Timing Diagram
1.4.3 JTAG AC Timing Specifications
Table 9 provides the JTAG AC timing specifications. Assume Vdd = AVdd = 3.3 ± 5% V DC, GND = 0 V
DC, CL = 50 pF, and 0
T
j 105C.
Table 9. JTAG AC Timing Specifications (Independent of SYSCLK)
Num
Characteristic
Min
Max
Unit
Notes
TCK frequency of operation
0
25
MHz
1
TCK cycle time
40
ns
2
TCK clock pulse width measured at 1.4 V
20
ns
3
TCK rise and fall times
0
3
ns
1
4TRST setup time to TCK rising edge
10
ns
2
5TRST assert time
10
ns
1
60x Bus Clock
12
15a
16
ALL Non-PCI
TS
ARTRY
VM
VM = Midpoint Voltage (1.4V)
15a
VM
18
14
13a
13
21
19
(Except TS and
ARTRY)
SYSCLK
12
15b
ALL
VM
14
OUTPUTS
13b
PCI OUTPUTS
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