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參數(shù)資料
| 型號(hào)： | MMDF2N02E |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Power MOSFET 2 Amps, 25 Volts N Channel SO8, Dual(2A,25V,SO-8,N溝道功率雙MOSFET) |
| 中文描述： | 功率MOSFET 2安培，25伏特?頻道SO8封裝，雙（第2A，25V的，SO - 8封裝，?溝道功率雙MOSFET的） |
| 文件頁(yè)數(shù)： | 4/7頁(yè) |
| 文件大?。?/td> | 94K |
| 代理商： | MMDF2N02E |
MMDF2N02E
http://onsemi.com
4
POWER MOSFET SWITCHING
Switching behavior is most easily modeled and predicted
by recognizing that the power MOSFET is charge
controlled. The lengths of various switching intervals ( t)
are determined by how fast the FET input capacitance can
be charged by current from the generator.
The published capacitance data is difficult to use for
calculating rise and fall because draingate capacitance
varies greatly with applied voltage. Accordingly, gate
charge data is used. In most cases, a satisfactory estimate of
average input current (I
G(AV)
) can be made from a
rudimentary analysis of the drive circuit so that:
t = Q/I
G(AV)
During the rise and fall time interval when switching a
resistive load, V
GS
remains virtually constant at a level
known as the plateau voltage, V
SGP
. Therefore, rise and fall
times may be approximated by the following:
t
r
= Q
2
x R
G
/(V
GG
V
GSP
)
t
f
= Q
2
x R
G
/V
GSP
where
V
GG
= the gate drive voltage, which varies from zero to V
GG
R
G
= the gate drive resistance and Q
2
and V
GSP
are read
from the gate charge curve.
During the turnon and turnoff delay times, gate current
is not constant. The simplest calculation uses appropriate
values from the capacitance curves in a standard equation for
voltage change in an RC network. The equations are:
t
d(on)
= R
G
C
iss
In [V
GG
/(V
GG
V
GSP
)]
t
d(off)
= R
G
C
iss
In (V
GG
/V
GSP
)
The capacitance (C
iss
) is read from the capacitance curve
at a voltage corresponding to the offstate condition when
calculating t
d(on)
and is read at a voltage corresponding to the
onstate when calculating t
d(off)
.
At high switching speeds, parasitic circuit elements
complicate the analysis. The inductance of the MOSFET
source lead, inside the package and in the circuit wiring
which is common to both the drain and gate current paths,
produces a voltage at the source which reduces the gate drive
current. The voltage is determined by Ldi/dt, but since di/dt
is a function of drain current, the mathematical solution is
complex. The MOSFET output capacitance also
complicates the mathematics. And finally, MOSFETs have
finite internal gate resistance which effectively adds to the
resistance of the driving source, but the internal resistance
is difficult to measure and, consequently, is not specified.
Figure 7. Capacitance Variation
C
GATETOSOURCE OR DRAINTOSOURCE VOLTAGE (VOLTS)
V
Q
g
, TOTAL GATE CHARGE (nC)
0
2
4
6
8
I
D
= 2.3 A
T
J
= 25
°
C
V
GS
6
3
0
12
9
16
12
8
4
0
V
DS
Q1
Q2
Q3
10
12
10
0
10
15
25
V
GS
V
DS
T
J
= 25
°
C
V
DS
= 0 V
V
GS
= 0 V
1000
800
600
400
200
0
20
C
iss
C
oss
C
rss
5
5
C
iss
C
rss
V
Figure 8. GatetoSource and
DraintoSource Voltage versus Total Charge
1200
QT
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