參數(shù)資料
型號(hào)： ML9620GAZ210
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： 1 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44
封裝： 0.80 MM PITCH, PLASTIC, QFP-44
文件頁數(shù)： 63/79頁
文件大?。?/td> 449K
代理商： ML9620GAZ210
ML9620 User’s Manual
Chapter 5
Electrical Characteristics
5 – 4
5.1.4.1.2 Parallel mode (VDD = 5.0V)
VDD = 4.5 to 5.5 V, GND = 0V
Ta = –40 to +125°C
CL = 50 pF
Parameter
Symbol
Condition
Min.
Max.
Unit
ALE Address Setup Time
tAS
—
10
—
ns
ALE Address Hold Time
tAH
—
10
—
ns
PRD Output Data Delay Time
tRDLY
—
1.5T
*
1
ns
PRD Output Data Hold Time
tRDH
—
5
—
ns
ALE ‘H’ Level Width
tWALEH
—
16.5
—
ns
When
PRDY is not
generated
4T
—
ns
Max Access
Cycle
When
PRDY is
generated
tcyc
—
10T
—
ns
Address Hold Time from
PRD
tRAH
—
0
—
ns
ALE Delay Time from
PRD
tHRA
—
27
—
ns
PRD ‘H’ Level Width
tWRDH
—
1T
—
ns
PRD ‘L’ Level Width
tWRDL
—
2T
—
ns
PRDY ‘L’ Delay Time
tARLDLY
—
15
ns
PRDY ‘L’ Level Width
tWRDYL
—
0
6T
ns
Data Output Delay Time from
PRDY
tARDDLY
—
5
ns
PWR Hold Time from PRDY
tARWDLY
—
10
—
ns
Input Data Setup Time
tWDS
—
30
—
ns
Input Data Hold Time
tWDH
—
4
—
ns
PRD Delay Time
tRS
—
10
—
ns
PWR Delay Time
tWS
—
10
—
ns
Address Hold Time from
PWR
tWAH
—
10
—
ns
ALE Delay Time from
PWR
tHWA
—
3T – 10
—
ns
PWR ‘H’ Level Width
tWRH
—
2.5T
—
ns
PWR ‘L’ Level Width
tWRL
—
1T
*
1
—
ns
CS Delay Time from PRD
tHRC
—
0
—
ns
CS Delay Time from PWR
tHWC
—
0
—
ns
T = 1/fOSC
The values with *1 indicate those when
PRDY is not generated.
The values with *1 when
PRDY is generated are defined by ‘Data Output Delay Time from PRDY’ t
ARDDLY and ‘PWR
Hold Time from
PRDY’ t
ARWDLY.
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