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參數(shù)資料
| 型號： | ML9620GAZ210 |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44 |
| 封裝： | 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 11/79頁 |
| 文件大?。?/td> | 449K |
| 代理商： | ML9620GAZ210 |
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ML9620 User’s Manual
Chapter 2
Register Descriptions
2 – 2
EIE
Error Interrupt Enable
0
No Error Interrupt will be detected.
1
A change in the bits BOff or EWarn in the Status Register will generate an
interrupt. (while IE=‘1’)
DAR
Disable Automatic Retransmission
0
Automatic Retransmission of disturbed message enabled.
1
Automatic Retransmission disabled.
CCE
Configuration Change Enable
0
The MCU has no write access to the Bit Timing Register.
1
The MCU has write access to the Bit Timing Register. (while Init =‘1’)
Option
Optional Function Enable
0
Cannot be using the optional functions.
The MCU has no write access to the
Optional Function Register.
1
Can be using the optional functions.
The MCU has write access to the Optional
Function Register. (while Init =‘1’)
Note
The busoff recovery sequence (return from busoff state)*
2 cannot be shortened by setting or resetting Init. If
the device goes busoff, it will set Init of its own accord, stopping all bus activities.
Once Init has been cleared
by the MCU, the device will then wait for 129 occurrences of Bus Idle (129 * 11 consecutive recessive bits)
before resuming normal operations.
At the end of the busoff recovery sequence, the Error Management
Counters will be reset.
During the waiting time after the resetting of Init, each time a sequence of 11 recessive bits has been
monitored, a Bit0Error code is written to the Status Register, enabling the MCU to readily check up whether the
CAN bus is stuck at dominant or continuously disturbed and to monitor the proceeding of the busoff recovery
sequence.
Note*
2
See Bosch CAN Specification Rev. 2.0.
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