參數(shù)資料
型號: ML60852
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: USB Device Controller
中文描述: USB設(shè)備控制器
文件頁數(shù): 43/81頁
文件大?。?/td> 451K
代理商: ML60852
PEDL60852-01
1
Semiconductor
ML60852
43/81
DMA0, 1 Interval Registers (DMA0, 1INTVL)
Address
Type
Access type
0 x 11, 0 x 13
Byte data
Read/Write
D7
0
D6
0
D5
0
The previous value is retained
Interval time
D4
0
D3
0
D2
0
D1
0
D0
0
After a hardware reset
After a bus reset
Definition
This specifies the interval in the single DMA transfer mode, that is, the time duration after the end of DMA transfer
of the previous byte (or the previous word) until DREQ is asserted again. The time for 1 bit is 84ns (12 MHz,
period of one-cycle).
Interval time = (DREQ enable time) + 84xn (ns)
See the description of the DMA Transfer Timings (1), (2), (5), and (6) for the DREQ enable time.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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