參數(shù)資料
型號(hào): MK30N512VMB100
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA81
封裝: 8 X 8 MM, MAPBGA-81
文件頁數(shù): 4/62頁
文件大小: 1728K
代理商: MK30N512VMB100
5.1.3 Voltage and current operating behaviors
Table 4. Voltage and current operating behaviors
Symbol
Description
Min.
Max.
Unit
Notes
VOH
Output high voltage — high drive strength
2.7 V ≤ VDD ≤ 3.6 V, IOH = -10mA
1.71 V ≤ VDD ≤ 2.7 V, IOH = -3mA
VDD – 0.5
V
Output high voltage — low drive strength
2.7 V ≤ VDD ≤ 3.6 V, IOH = -2mA
1.71 V ≤ VDD ≤ 2.7 V, IOH = -0.6mA
VDD – 0.5
V
IOHT
Output high current total for all ports
100
mA
VOL
Output low voltage — high drive strength
2.7 V ≤ VDD ≤ 3.6 V, IOL = 10mA
1.71 V ≤ VDD ≤ 2.7 V, IOL = 3mA
0.5
V
Output low voltage — low drive strength
2.7 V ≤ VDD ≤ 3.6 V, IOL = 2mA
1.71 V ≤ VDD ≤ 2.7 V, IOL = 0.6mA
0.5
V
IOLT
Output low current total for all ports
100
mA
IIN
Input leakage current (per pin)
1
μA
IOZ
Hi-Z (off-state) leakage current (per pin)
1
μA
RPU
Internal pullup resistors
30
50
RPD
Internal pulldown resistors
30
50
1. Measured at VDD=3.6V
2. Measured at VDD supply voltage = VDD min and Vinput = VSS
3. Measured at VDD supply voltage = VDD min and Vinput = VDD
5.1.4 Power mode transition operating behaviors
All specifications except tPOR, and VLLSx→RUN recovery times in the following table
assume this clock configuration:
CPU and system clocks = 100 MHz
Bus clock = 50 MHz
Flash clock = 25 MHz
General
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
12
Preliminary
Freescale Semiconductor, Inc.
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