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參數(shù)資料
| 型號(hào)： | MK30N512VMB100 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA81 |
| 封裝： | 8 X 8 MM, MAPBGA-81 |
| 文件頁(yè)數(shù)： | 31/62頁(yè) |
| 文件大?。?/td> | 1728K |
| 代理商： | MK30N512VMB100 |
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Table 26. 16-bit ADC with PGA characteristics (continued)
Symbol
Description
Conditions
Min.
Typ.1
Max.
Unit
Notes
G
Gain4
PGAG=0
PGAG=1
PGAG=2
PGAG=3
PGAG=4
PGAG=5
PGAG=6
TBD
0.98
1.99
3.97
7.95
15.8
31.4
61.2
TBD
RAS < 100Ω
BW
Input signal
bandwidth
16-bit modes
< 16-bit modes
—
4
40
kHz
PSRR
Power supply
rejection ration
Gain=1
TBD
—
dB
VDDA= 3V
±100mV,
fVDDA= 50Hz,
60Hz
CMRR
Common mode
rejection ratio
Gain=1
Gain=64
TBD
—
dB
VCM=
500mVpp,
fVCM= 50Hz,
100Hz
VOFS
Input offset
voltage
—
0.2
TBD
mV
Gain=1, ADC
Averaging=32
TGSW
Gain switching
settling time
—
10
s
dG/dT
Gain drift over
temperature
Gain=1
Gain=64
—
TBD
ppm/°C
0 to 50°C
dVOFS/dT Offset drift over
temperature
Gain=1
—
TBD
ppm/°C 0 to 50°C, ADC
Averaging=32
dG/dVDDA Gain drift over
supply voltage
Gain=1
Gain=64
—
TBD
%/V
VDDA from 1.71
to 3.6V
EIL
Input leakage
error
All modes
IIn × RAS
mV
IIn = leakage
current
(refer to the
MCU's voltage
and current
operating
ratings)
VPP,DIFF
Maximum
differential input
signal swing
where VX = VREFPGA × 0.583
V
SNR
Signal-to-noise
ratio
Gain=1
Gain=64
TBD
83.0
57.5
—
dB
16-bit
differential
mode,
Average=32
Table continues on the next page...
Peripheral operating requirements and behaviors
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
37
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| MK30N512VMC100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
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