參數(shù)資料
型號(hào)： MCV18ET-I/SO
元件分類： 微控制器/微處理器
英文描述： FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO18
封裝： 7.50 MM, LEAD FREE, SOIC-18
文件頁(yè)數(shù)： 99/108頁(yè)
文件大?。?/td> 1509K
代理商： MCV18ET-I/SO
MCV18E
DS41399A-page 90
2009 Microchip Technology Inc.
FIGURE 10-7:
TIMER0 AND TIMER1 EXTERNAL CLOCK TIMINGS(1)
TABLE 10-5:
TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
40*
Tt0H
T0CKI High Pulse Width
No Prescaler
0.5TCY + 20
—
ns
Must also meet
parameter 42
With Prescaler
10
—
ns
41*
Tt0L
T0CKI Low Pulse Width
No Prescaler
0.5TCY + 20
—
ns
Must also meet
parameter 42
With Prescaler
10
—
ns
42*
Tt0P
T0CKI Period
No Prescaler
TCY + 40
—
ns
With Prescaler
Greater of:
20 or TCY + 40
N
—
ns
N = prescale
value
(2, 4,..., 256)
45*
Tt1H
T1CKI High Time Synchronous, Prescaler = 1
0.5TCY + 20
—
ns
Must also meet
parameter 47
Synchronous,
Prescaler =
2,4,8
Standard
15
—
ns
Asynchronous Standard
30
—
ns
46*
Tt1L
T1CKI Low Time
Synchronous, Prescaler = 1
0.5TCY + 20
—
ns
Must also meet
parameter 47
Synchronous,
Prescaler =
2,4,8
Standard
15
—
ns
Asynchronous Standard
30
—
ns
47*
Tt1P
T1CKI input
period
Synchronous
Standard
Greater of:
30 OR TCY + 40
N
—
ns
N = prescale
value (1, 2, 4, 8)
Asynchronous Standard
60
—
ns
Ft1
Timer1 oscillator input frequency range
(oscillator enabled by setting bit T1OSCEN)
32.768
—
32.768
kHz
48*
TCKEZtmr1 Delay from external clock edge to timer increment
2Tosc
—
7Tosc
—
*
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1:
Refer to Figure 10-2 for load conditions.
46
47
45
48
41
42
40
T0CKI
T1OSO/T1CKI
TMR0 or
TMR1
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